Hugging Face's logo

Datasets:
AbiralArch
/
hardware-verilogeval-v2

Tasks:
Text Generation
Modalities:
Text
Formats:
json
Languages:
code
Size:
< 1K
Tags:
hardware
rtl
verilog
systemverilog
fpga
asic
Libraries:
Datasets
pandas
Dataset card Data Studio Files
xet
Community
1
AbiralArch commited on
Commit
d46132c
·
verified ·
1 Parent(s): cdc81cf

Upload verilog_eval_problems.json with huggingface_hub

Browse files
Files changed (1) hide show
  1. verilog_eval_problems.json +0 -0
verilog_eval_problems.json ADDED
The diff for this file is too large to render. See raw diff