The lower 3000 CPU was a 24-bit architecture: instructions were 24 bits in length, as were the two operand registers A and Q. There were four index registers of 15 bits, B0 through B3, though B0 is always zero (zero when read; writes do not affect the value). There was no status (flags or condition code) register. Up to 32,768 words of core memory, 24 bits per word, could be directly addressed, and multiple banks could be switched in. Two or three memory bank configurations were the most common.
