ontains the attributes for Tile DMA Channel registers. </p>
</div><h2 class="groupheader">Field Documentation</h2>
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          <td class="memname">u32 XAieGbl_RegTileDmaCh::CtrlOff</td>
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<p>Control register offset. </p>

<p>Referenced by <a class="el" href="xaiedma__tile_8h.html#ae1606aab03539f296736d3d07bb