Verilog HDL</TD></TR><TR><TD><B>Output Directory</B></TD><TD>D:\kekai_jan29\Mar5_4core_switch\projects\DE4_Reference_Router_with_DMA\synth\windows</TD></TR></TABLE></TD></TR><TR><TD><h2>File Summary</h2>The MegaWizard interface is creating the following files in the output directory:</TD></TR><TR><TD><TABLE cellspacing=2 cellpadding=2 border=1 width="100%"><TR align="left"><TH align="left" align="top" width="25%"><B>File</B></TH><TH align="left"><B>Description</B></TH></TR><TR><TD>tse_mac3.v</TD><TD>A MegaC