ust save extra information to the stack upon exception entry. With the lazy stacking option enabled, the core will skip the saving of floating-point registers when possible, reducing average interrupt latency.</p>
<dl class="section note"><dt>Note</dt><dd>At reset of the Cortex M4, the ASPEN and LSPEN bits are set to 1, enabling Lazy mode by default. Therefore this function will generally only have an affect when setting for full-context save (or when switching from full-context to lazy mode).</dd>
<dd>
See