 also: infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0298a/DAFGGBJD.html</dd>
<dd>
Three valid FPU context saving modes are possible.<ol type="1">
<li>Lazy ASPEN=1 LSPEN=1 am_hal_sysctrl_fpu_stacking_enable(true) and default.</li>
<li>Full-context ASPEN=1 LSPEN=0 am_hal_sysctrl_fpu_stacking_enable(false)</li>
<li>No FPU state ASPEN=0 LSPEN=0 <a class="el" href="group__sysctrl4__4b.html#ga13806327b2d6ea183631003b4336e4d3" title="Disable FPU register stacking on exception entry.">am_hal_sysctrl_fpu_