td colspan=2 class=SEntry><a href="#Macros_and_Defines" >Macros and Defines</a></td></tr>
<tr class=SMain><td colspan=2 class=SWideDescription>UVM includes some macros to allow the user to specify intent without the need to specify multiple types of SystemVerilog constructs. </td></tr></table></div></div><!--END_ND_SUMMARY-->
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