X0</p>
<p>SRC</p>
<p>X3</p>
<p>X2</p>
<p>X1</p>
<p>X0</p>
<p>DEST</p>
<h3>Figure 3-10.  CVTDQ2PD (VEX.256 encoded version)</h3>
<h2>Operation</h2>
<p><strong>CVTDQ2PD (128-bit Legacy SSE version)</strong></p>
<pre>DEST[63:0] ← Convert_Integer_To_Double_Precision_Floating_Point(SRC[31:0])
DEST[127:64] ← Convert_Integer_To_Double_Precision_Floating_Point(SRC[63:32])
DEST[VLMAX-1:128] (unmodified)</pre>
<p><strong>VCVTDQ2PD (VEX.128 encoded version)</strong></p>
<pre>DEST[63:0] ← Convert_Integer_To_Doubl