D>
    <TD>c_has_lock=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_is_cascaded=0</TD>
    <TD>c_m_aruser_width=1</TD>
    <TD>c_m_awuser_width=1</TD>
    <TD>c_m_buser_width=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_m_id_width=0</TD>
    <TD>c_m_limit_read_length=16</TD>
    <TD>c_m_limit_write_length=16</TD>
    <TD>c_m_protocol=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_m_ruser_bits_per_byte=0</TD>
    <TD>c_m_ruser_width=0</TD>
    <TD>c_m_wuser_bits_per_byte=0</TD>
    <TD>c_m_wuser_width=0</TD>
</TR><