MsoNormal>The IRC and IR registers are the actual prefetch queue. The
IRD is the only register that is somehow seen externally at the programming
model. And because of this reason the IRD register is sometimes referred simply
as IR. You can’t access this register directly, but its content is the one that
is stored in the exception frame on a bus or address error.</p>

<p class=MsoNormal><![if !supportEmptyParas]>&nbsp;<![endif]><o:p></o:p></p>

<p class=MsoNormal>Any instruction opcode comes from 