0000000H;
              SEL ← 7:
                              MASK ← FFFF0000000000000000000000000000H;
    DEST ← (DEST AND NOT MASK) OR (((SRC &lt;&lt; (SEL ∗ 16)) AND MASK);</pre>
<p><strong>VPINSRW (VEX.128 encoded version)</strong></p>
<pre>SEL ← imm8[2:0]
DEST[127:0] ← write_w_element(SEL, SRC2, SRC1)
DEST[VLMAX-1:128] ← 0</pre>
<h2>Intel C/C++ Compiler Intrinsic Equivalent</h2>
<p>PINSRW:</p>
<p> __m64 _mm_insert_pi16 (__m64 a, int d, int n)</p>
<p>PINSRW:</p>
<p> __m128i _mm_insert_ep