 the <em>Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3C</em>, for more information about the behavior of this instruction in VMX non-root operation.</p>
<h2>Operation</h2>
<pre>CR0.TS[bit 3] ← 0;</pre>
<h2>Flags Affected</h2>
<p>The TS flag in CR0 register is cleared.</p>
<h2>Protected Mode Exceptions</h2>
<table class="exception-table">
<tr>
<td>#GP(0)</td>
<td>If the current privilege level is not 0.</td></tr>
<tr>
<td>#UD</td>
<td>If the LOCK prefix is used.</td></tr></tabl