le behavior across different processor generations.</p>
<h2 id="operation">Operation<a class="anchor" href="#operation">
			¶
		</a></h2>
<h3 id="vaddss--evex-encoded-versions-">VADDSS (EVEX encoded versions)<a class="anchor" href="#vaddss--evex-encoded-versions-">
			¶
		</a></h3>
<pre>IF (EVEX.b = 1) AND SRC2 *is a register*
    THEN
        SET_RM(EVEX.RC);
    ELSE
        SET_RM(MXCSR.RM);
FI;
IF k1[0] or *no writemask*
    THEN DEST[31:0]←SRC1[31:0] + SRC2[31:0]
    ELSE
        IF *merging-maskin