it integer, meaning that the instruction set is a
constant-width RISC instruction set like MIPS. The opcode of each instruction is
the least significant byte of the instruction. The highest bit of this leading
byte is reserved for debugging purpose, so there are 128 possible opcodes
encodable with this scheme. Not all of these possible opcodes are defined, and
undefined opcodes will trap the interpreter and emit a debug signal. Note that
this means an unknown opcode is still valid bytecode, it will just put