h=32</TD>
    <TD>c_read_acceptance=32</TD>
    <TD>c_s_id_width=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_sep_route_width=1</TD>
    <TD>c_single_issuing=0</TD>
    <TD>c_supports_read_deadlock=0</TD>
    <TD>c_supports_write_deadlock=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_wdata_width=32</TD>
    <TD>c_write_acceptance=32</TD>
    <TD>core_container=NA</TD>
    <TD>iptotal=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>x_ipcorerevision=6</TD>
    <TD>x_iplanguage=VERILOG</TD>
    <TD>x_iplibrary=ip</TD>
 