ion operands are XMM registers. The second source operand is an XMM register or a 128-bit memory location. Bits (VLMAX-1:128) of the destination YMM register are zeroed.</p>
<p>VEX.256 encoded version: The second source operand can be an YMM register or a 256-bit memory location. The first source and destination operands are YMM registers.</p>
<p>Note: VEX.L must be 0, otherwise the instruction will #UD.</p>
<h2>Operation</h2>
<pre>IF (DEST[15:0] &gt; SRC[15:0])
    THEN DEST[15:0] ← DEST[15:0];
    ELSE 