rence clock of the CPLL. </p>

<p>Referenced by <a class="el" href="group__xhdmiphy1.html#ga0fa2836b8aac17e187bf1e01a462001a">XHdmiphy1_WriteCfgRefClkSelReg()</a>.</p>

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          <td class="memname">u64 XHdmiphy1_Channel::LineRateHz</td>
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<p><pre class="fragment">     The line rate for the
<