e of manufacturing errors. The main concept is to create scan chains consisting of all registers in the system to be able to observe and control most of the nodes of the circuit (i.e. achieve high coverage). After DFT insertion, all the flip-flops (except shift registers) are replaced with scan flip-flops.</p>
<p><strong>DFT ports:</strong></p>
<ul>
    <li>scan_clk: The clock which the system uses in test mode</li>
    <li>scan_reset: The reset which the system uses in the test mode</li>
    <li>SE: Scan e