his module is verified through self-checking testbench in Modelsim. The testbench can be run using <code>run.tcl</code> script.</p>
<hr>
<h3 id="reset-synchronizer">Reset Synchronizer</h3>
<p>It is used to synchronize a global reset signal to different clock domains. It consists of multiple flip-flops connected in a cascaded scheme, and the number of stages is parametrized with a default value of 2.</p>
<h4 id="logic-diagram">Logic Diagram</h4>
<img src="docs/screenshots/system_design/reset_synchronizer/res