<th>Op/En</th>
<th>64/32 bit Mode Support</th>
<th>CPUID Feature Flag</th>
<th>Description</th></tr>
<tr>
<td>F3 0F 1A /r BNDCL bnd, r/m32</td>
<td>RM</td>
<td>NE/V</td>
<td>MPX</td>
<td>Generate a #BR if the address in r/m32 is lower than the lower bound in bnd.LB.</td></tr>
<tr>
<td>F3 0F 1A /r BNDCL bnd, r/m64</td>
<td>RM</td>
<td>V/NE</td>
<td>MPX</td>
<td>Generate a #BR if the address in r/m64 is lower than the lower bound in bnd.LB.</td></tr></table>
<h2 id="instruction-operand-encoding">Instruction O