, making it possible to collapse 
 to the macrocell limits, reduce levels of logic, and minimize the total 
 number of p-terms.</p>

<p class="whs10">Multi-level Logic Optimization optimizes 
 all combinatorial logic arcs spanning from an input pad or register output 
 to an output pad or register input.</p>

<p class="whs11">Multi-level Logic Optimization operates 
 on combinatorial logic according to the following rules.</p>

<p class="whs12">If timing constraints are set, the program 
 optimizes for spee