td>A signal to indicate that the sampled start bit is wrong (i.e. the samples are 011 or 111 or 110 or 101).</td>
    </tr>
    <tr>
        <td>parity_bit_error</td>
        <td>input</td>
        <td align="center">1</td>
        <td>A signal to indicate that the sampled parity bit is wrong.</td>
    </tr>
    <tr>
        <td>stop_bit_error</td>
        <td>input</td>
        <td align="center">1</td>
        <td>A signal to indicate that the sampled stop bit is wrong (i.e. the samples are 100 or 000 or 