mment">% enforce D_i &lt;= T_i for gates i connected to primary inputs</span>
        D(gate) &lt;= T(gate);
      <span class="keyword">end</span>
    <span class="keyword">end</span>

    <span class="comment">% circuit delay is the max of arrival times for output gates</span>
    output_gates = [FI{primary_outputs}];
    circuit_delay = max( T(output_gates) );

    <span class="comment">% collect all the constraints</span>
    circuit_delay &lt;= Dmax;
    x_min &lt;= x &lt;= x_max;
cvx_end

<span class=