the ALU control signals (ALU_function, ALU_enable, ALU_clk_enable) and register file control signals (address, write_enable, write_data, read_enable) based on the received frames from the UART receiver (i.e. according to the command to be executed).</p>
<h5 id="finite-state-machine-fsm">Finite State Machine (FSM)</h5>
<p>The &quot;EVALUATE_RESULT&quot; state is a dummy state whose function is to delay the return to the &quot;IDLE&quot; state for one cycle so that &quot;ALU_clk_enable&quot; signal goes high 