 LPTIM driver update.</li>
<li>Move definition of FLASH_BANK2_BASE start address to stm32l0xx_hal_flash.h to be dependant on Memory Size register.</li>
<li>Update interrupt definition to use DMA1_Channel4_5_IRQn for STM32L011xx and STM32L021xx devices.</li>
<li>Correct PWR_WAKEUP_PIN definitions for L011xx and L021xx devices.</li>
</ul></li>
<li>system_stm32l0xx.c
<ul>
<li>Update file to correct comments for VECT_TAB_OFFSET definition.</li>
<li>Update default MSI_VALUE reset value set in SystemCoreClock.</l