lave_TRI
Requested Frequency:    15.7 MHz
Wire load mode:         top
Paths requested:        0
Constraint File(s):    C:\Users\morpack\Documents\morpack_fpga\hydra\MasterSlave_TRI.sdc
                       
@N:<a href="@N:MT320:@XP_HELP">MT320</a> : <!@TM:1370949641> | Timing report estimates place and route data. Please look at the place and route timing report for final timing. 

@N:<a href="@N:MT322:@XP_HELP">MT322</a> : <!@TM:1370949641> | Clock constraints cover only FF-to-FF paths associated