COUNT_0 &lt; 32 THEN
DEST[31:0] ← ZeroExtend(SRC1[31:0] &gt;&gt; COUNT_0);
ELSE
DEST[31:0] ← 0;
    (* Repeat shift operation for 2nd through 4th dwords *)
IF COUNT_3 &lt; 32 THEN
DEST[127:96] ← ZeroExtend(SRC1[127:96] &gt;&gt; COUNT_3);
ELSE
DEST[127:96] ← 0;
DEST[VLMAX-1:128] ← 0;</pre>
<p><strong>VPSRLVD (VEX.256 version)</strong></p>
<pre>COUNT_0 ← SRC2[31 : 0];
    (* Repeat Each COUNT_i for the 2nd through 7th dwords of SRC2*)
COUNT_7 ← SRC2[255 : 224];
IF COUNT_0 &lt; 32 THEN
DEST[31:0]