. Use of the REX.W prefix promotes operation to 128 bits. Note that CMPXCHG16B requires that the destination (memory) operand be 16-byte aligned. See the summary chart at the beginning of this section for encoding data and limits. For information on the CPUID flag that indicates CMPXCHG16B, see page 3-175.</p>
<h2>IA-32 Architecture Compatibility</h2>
<p>This instruction encoding is not supported on Intel processors earlier than the Pentium processors.</p>
<h2>Operation</h2>
<pre>IF (64-Bit Mode and Operand