as the width of destination domain. This pulse can be considered as a new 'data valid' signal synchronized to the destination domain and the data can be read safely from the 'asynchronous_data' port without the risk of entering metastability.</p>
<h4 id="logic-diagram">Logic Diagram</h4>
<img src="docs/screenshots/system_design/data_synchronizer/data_synchronizer.png">
<h4 id="port-description">Port Description</h4>
<table>
    <tr>
        <th align="left">Port</th>
        <th>Direction</th>
        <th>W