 </td><td align="left">- </td><td align="left">Reserved. </td></tr>
<tr>
<td align="left">[13] </td><td align="left">V </td><td align="left">Vectors bit. </td></tr>
<tr>
<td align="left">[12] </td><td align="left">I </td><td align="left">Instruction cache enable bit. </td></tr>
<tr>
<td align="left">[11] </td><td align="left">Z </td><td align="left">Branch prediction enable bit. </td></tr>
<tr>
<td align="left">[10] </td><td align="left">SW </td><td align="left">SWP and SWPB enable bit. </td></tr>
<tr>
<td 