BD <em>ymm1, ymm2, ymm3/m256</em></td>
<td>RVM</td>
<td>V/V</td>
<td>AVX2</td>
<td>Subtract 32-bit signed integers horizontally, pack to <em>ymm1</em>.</td></tr></table>
<blockquote>
<p>1. See note in Section 2.4, “AVX and SSE Instruction Exception Specification” in the <em>Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 2A</em> and Section 22.25.3, “Exception Conditions of Legacy SIMD Instructions Operating on MMX Registers” in the <em>Intel® 64 and IA-32 Architectures Sof