000000000000000000000FFFFFFF2, 000000000000000000000000FFFFFFF3, ...). The design Transmit_Delay_ROM.v has one read port. The read port has 8 words of 128 bits each. The output of the read port is registered by clock. </P>
<CENTER><img src=Transmit_Delay_ROM_wave0.jpg> </CENTER>
<P><CENTER><FONT size=2>Fig. 1 : Wave showing read operation. </CENTER></P>
<P><FONT size=3>The above waveform shows the behavior of the design under normal read conditions. The read happens at the rising edge of the enabled cloc