 ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files
2011.08.26.15:34:28 [Debug] Command: /home/hwang/altera/11.0/quartus/bin/quartus_map not_a_project --generate_hdl_interface=/home/hwang/sonic/projects/sonic_fpga/src/top_examples/misc/avalon_mm_master/write_master.v --source=/home/hwang/sonic/projects/sonic_fpga/src/top_examples/misc/avalon_mm_master/write_master.v --set=HDL_INTERFACE_OUTPUT_PATH=/tmp/alt5212_1573600266993779043.dir/0007_sopcqmap/
2011.08.26.15:34:30 [Debug] Command took 1.539s
2011.08.2