efinition
<ul>
<li>RCC_CFGR register: MCOPRE[0:2] and PLLNODIV</li>
<li>SYSCFG_CFGR1 register: FMP_I2C1, FMP_PA9 and FMP_PA10</li>
</ul></li>
</ul></li>
<li>system_stm32f0xx.c
<ul>
<li>SystemInit(): update to reset new bits added in RCC_CFGR register</li>
</ul></li>
<li>Add new startup files, startup_stm32f0xx_ld.s, for the supported compilers</li>
</ul>
</div>
</div>
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