temp15[31:0] ← INT32 ((SRC1[255:240] * SRC2[255:240) &gt;&gt;14) + 1</pre>
<h2>Intel C/C++ Compiler Intrinsic Equivalents</h2>
<p>PMULHRSW:</p>
<p> __m64 _mm_mulhrs_pi16 (__m64 a, __m64 b)</p>
<p>(V)PMULHRSW:</p>
<p> __m128i _mm_mulhrs_epi16 (__m128i a, __m128i b)</p>
<p>VPMULHRSW:</p>
<p>__m256i _mm256_mulhrs_epi16 (__m256i a, __m256i b)</p>
<h2>SIMD Floating-Point Exceptions</h2>
<p>None.</p>
<h2>Other Exceptions</h2>
<p>See Exceptions Type 4; additionally</p>
<table class="exception-table">
<tr>
<td>#U