upt generation is enabled in the Timer Control Register.</p>
<p>Writing to the Timer Counter Register or Timer Load Register forces the Timer Counter Register to decrement from the newly written value. </p>

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          <td class="memname"><a class="el" href="core__ca_8h.html#a4cc1649793116d7c2d8afce7a4ffce43">__IM</a> uint32_t Timer_Type::ISR</td>