 with VEX.L not equal to 0 will cause #UD.</p>
<h2>Operation</h2>
<pre>temp ← (SRC-1) bitwiseAND ( SRC );
SF ← temp[OperandSize -1];
ZF ← (temp = 0);
IF SRC = 0
    CF ← 1;
ELSE
    CF ← 0;
FI
DEST ← temp;</pre>
<h2>Flags Affected</h2>
<p>ZF and SF flags are updated based on the result. CF is set if the source is zero. OF flag is cleared. AF and PF flags are undefined.</p>
<h2>Intel C/C++ Compiler Intrinsic Equivalent</h2>
<p>BLSR:</p>
<p>unsigned __int32 _blsr_u32(unsigned __int32 src);</p>
<p>