emp5[16:1];
    DEST[111:96] = temp6[16:1];
    DEST[127:112] = temp7[16:1];</pre>
<p><strong>VPMULHRSW (VEX.128 encoded version)</strong></p>
<pre>temp0[31:0] ← INT32 ((SRC1[15:0] * SRC2[15:0]) &gt;&gt;14) + 1
temp1[31:0] ← INT32 ((SRC1[31:16] * SRC2[31:16]) &gt;&gt;14) + 1
temp2[31:0] ← INT32 ((SRC1[47:32] * SRC2[47:32]) &gt;&gt;14) + 1
temp3[31:0] ← INT32 ((SRC1[63:48] * SRC2[63:48]) &gt;&gt;14) + 1
temp4[31:0] ← INT32 ((SRC1[79:64] * SRC2[79:64]) &gt;&gt;14) + 1
temp5[31:0] ← INT32 ((SRC1[95