ndles counting up from 001 or 101.  The next two lines handle 011 and 111.  The last line ensures that the output doesn't change unless the clock makes a positive transition.
</p><h3> 3 input NAND with enable: </h3>
<p>
Inputs: <tt>A,B,C,En</tt><br>
Outputs: <tt>X</tt><br>
Definition:</p><pre>1111=0
???1=1
???0=_
</pre>
<p>
Same as the 3 input NAND above, except that the output goes into a high-impedance state if the enable pin is low.
</p><p>
</p><h3> Tri-state buffer: </h3>
<p>
Inputs: <tt>A,En</tt><br>
O