 0,D+DO+2        | Absolute Address Bank |    R     |
    |           6   |  AAB,AA          | Data Low              |   R/W    |
    |       (1) 6a  |  AAB,AA+1        | Data High             |   R/W    |
    +---------------+------------------+-----------------------+----------+
    (1) Add 1 cycle for M=0 or X=0 (i.e. 16 bit data).
    (2) Add 1 cycle for direct register low (DL) not equal 0.

    See also: <A HREF="ADDRABR.HTM">Abbreviations</A>

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