Forget the doomsayers' prediction of legions of nanobots wreaking havoc when it comes time for fabrication. Researchers in the nano trenches insist that molecular-scale devices will remain tethered tightly to existing silicon lithography for the foreseeable future.
Researchers nationwide participating in the current $850 million U.S. National Nanotechnology Initiative (and the upcoming $3.7 billion U.S. 21st Century Nanotechnology Research and Development Act) are studying all angles of nanoscale electronics and other nanobot "precursors" such as nanoelectromechanical devices. However, only the deepest research basements are attempting to reinvent silicon-manufacturing techniques and assemble nanoscale electronic devices from scratch. Scientists are looking for a meeting point between bottom-up nanoscale self-assembly steps and top-down silicon lithography steps.
One thing everyone agrees on is that achieving perfection at the nanoscale level is never going to happen. Approaches to dealing with the inherent imperfection of the nano-to-micro interface fall into two camps: render imperfection transparent through redundancy and error correction, or embrace-even harness-imperfection through self-organized maps and exotic materials.
"What Hewlett-Packard Labs and Caltech, for instance, are doing to solve the problem is use a smart demultiplexing scheme to reduce the number of I/O lines to something manageable," said professor James Tour at Rice University (Houston). "Say you only have to address four lines to reach 100 crossings in a crossbar switch-that's pretty good."
Tour posited a situation where "you could have a row of lines coming out at a pitch of 10 nanometers, and not all of them will be good." A solution might be to adopt the tactics used by a hard-disk drive, which "maps around bad blocks on the disk," he said. "There are a lot of smart people in industry thinking about this."
With the semiconductor industry panting over the possibilities inherent in extending the micron-scale chip into the nanoscale realm with smart demultiplexing and error correction, you'd think harebrained ideas about "harnessing inhomogeneities" would be on the back burner. You would be wrong, however. Tour's group at Rice University, for instance, is exploring "nanocells" (see www.eetimes.com/story/OEG20031031S0022) that handle imperfections, even defects, by mapping around them.
"What we are doing with our nanocell is at the other extreme from perfection," Tour said. "We expect there to be inhomogeneities. What we are saying is that we are going to have a plethora of nanoscale devices on-chip, and we are not going to worry about where they are or how they work; instead, we will just use voltage pulses to program them to do what we want them to do." Tour said that "there are a lot of different ways to get around inhomogeneity. Our nanocell can handle a ton of it. Hewlett-Packard's crossbar can deal with about 3 percent faults, but 4 percent is much harder."
Whether you are for or against perfection at the nanoscale, you will find yourself in good company.
"Both sides have their advocates, but we really don't have enough data to really make a declaration as to what degree of perfection we are dealing with yet," said professor Chris Gorman, one of 11 nanotechnology researchers at North Carolina State University. "We don't even yet know how reliably a single-molecule device will work, even if it is perfectly synthesized and assembled. We may have to use small collections of molecules, but it's too early to tell."
And that is the crux of the problem: A nanometer is the size of a molecule-about four or five atoms. Hence, at the extreme small end of the nanoscale, individual molecules are proposed as the information carriers. But how can molecules store information? In the imagined world of runaway nanobots, the solutions to such problems are simple and obvious-molecules represent ones and zeroes by simply changing state electrically, magnetically or even by altering shape. In the real world of silicon lithography, however, single molecules may not prove reliable enough to be trusted with our bank balances-at least not without transparent error correction.'Unsolved issues'
To gauge how much trust to impart to individual molecules, Gorman's three-year study for the National Science Foundation's National Interdisciplinary Research Team program will attempt to connect microscale devices to individual molecules, right down to the holy grail-a three-terminal, single-molecule transistor. Characterizing the reliability and switching capabilities of molecular devices in general is Gorman's goal, rather than proving the concept, which researchers have already done many times. In short, Gorman's task for NSF is to characterize molecular devices well enough so that industrial researchers can determine how best to pick up the baton.
As the National Science Foundation points out: "This type of research will ultimately be performed by corporate research and development, but at NSF we believe that there are fundamental, unsolved issues that must be addressed before such entities can assume the risk of such research."
What this means to electrical engineers today is that researchers don't yet even know if molecular-size devices are best-suited for encoding information in digital, analog or some other form, like the "qubits" used by quantum dots. Many different molecules are capable of switching digitally, but Gorman at North Carolina State plans to characterize their reliability as well as measure the analog capabilities of single molecules-such as amplification. "We want to demonstrate gain, and we are hoping to change the charge state of a molecule in order to achieve amplification," Gorman said.
Funded to the tune of $1.3 million, his three-year study, "Hierarchical Assembly of Interconnects for Molecular Electronics," will approach the nanoscale-to-microscale interface by attempting a "perfect," albeit self-assembled, array of nanoscale transistors on an otherwise lithographically patterned silicon wafer. The process is called orthogonal self-assembly.
"The orthogonal self-assembly principle has been out there as an idea for quite a while, but it's never been tested in this sort of way," Gorman said. "We want to test how robustly orthogonal self-assembly can allow us to put a molecule in the right place, in the right orientation."
The main idea that Gorman professes to be testing is no less than whether orthogonal self-assembly, as a fusion of top-down and bottom-up fabrication approaches, will solve the nano-to-micro interface problem.
"Self-assembly represents the bottom-up approach, and the conventional silicon and metal lithography represents the top-down approach. We are going to try and figure out what proportion of each seems to be a good first solution, and if we can establish some rules, then that will open up a lot of ground for optimization," Gorman said.
Meanwhile, other researchers think engineers must give up traditional digital-vs.-analog thinking altogether, and instead embrace the inherent quantum nature of the nanoscale. By confining information carriers to less than the scale of a molecule, the inherent quantum-mechanical quantities dominate its behavior, for instance, the qubits of quantum dots. The extremely small size of quantum dots-typically 1 to 10 nanometers-plus their floating-gate architecture make them a natural for fabricating in selected areas of pre-patterned silicon wafers. One such project, also funded by the National Science Foundation at $1.2 million for three years, is in progress at the University of Texas (Austin).
"To bridge the gap between traditional lithography and quantum dots will take a little bit of everything," said professor Sanjee Banerjee at the University of Texas. "One approach we are trying is not to use lithography to form the quantum dot, but instead to use spatially ordered self-assembly." The group, Banerjee said, is developing "a novel lithography technique, called imprint lithography, using a glass template-wherever there are dimples on the template, that's where holes on the wafer will form, hopefully allowing quantum dots to nucleate more uniformly in terms of size and spatial location."
'Get what we want'
Banerjee's NSF research project, "Spatially Ordered Self-Assembled Quantum-Dot Gate Low-Voltage/Power, High-Speed Nanoscale Flash Memories," will attempt to pre-pattern wafers with lithography, while leaving areas for later fabrication of quantum dots. "There is still a kind of randomness to the size and placement of the quantum dots, so what we do is make sure that there is enough room for many, perhaps hundreds or thousands, of dots. We still don't know exactly where they are, but on average we can get what we want," Banerjee said.
Schemes attempting to assign molecular-size devices to designated areas of a chip, perhaps using thousands of molecules to represent a single bit, are called "CMOS with afterburners."
"I think something called 'CMOS with afterburners' will bridge the gap to the nanoscale first," said Rice University's Tour. "That's the idea that you use molecules to store your states, because it has already been demonstrated that you can store molecular states for as long as 15 minutes or longer without refreshing-making it competitive with flash."