Intel's Silverthorne a 'Building Block' for the Future
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It's becoming clear that the low-power Silverthorne processor is more than a new chip. It is a building block for Intel's future road map.
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Processor, platform and chipset roadmap It's time to synchronise watches, check diaries and make sure we're all up to speed on Intel's 2008 processor launch plans.â¦
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Upcoming Opteron chips will occupy the same space as single-core models.
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Looking to get the most out of multi-core processors, a European-driven effort to build a framework for Java-based, real-time applications on modern multi-core chips and parallel processor systems is being announced Tuesday.Called the Java Environment for Parallel Real-time Development, or JEOPARD, the project is being underwritten by the European Commission (EC) to the tune of more than $4.9 million (3.3 million Euros), said The Open Group, which is participating in the project.The objective is to provide tools for platform-independent development of predictable systems that make use of symmetric multiprocessing multi-core platforms and field programmable gate array components, Open Group said. Tools plan would enhance software productivity and reusability by extending processor technology established on desktop systems for the needs of multi-core embedded systems."If you go out and buy a laptop or server, you get four-core processors or whatever. The way people program both applications and OSes hasn't really taken full advantage of the capabilities of these multi-core processors," said Dave Lounsbury, vice president for government services at The Open Group. "This is a hot topic. I think everybody recognizes there are some limitations right now," in making use of multi-core systems, he said.JEOPARD will research how to build APIs, OS extensions and language support for multi-core processors, with a special emphasis on embedded systems, Lounsbury said.The project will delve into extensions to handle different memory configurations. Situations will be considered in which there is not full symmetry, such as when a processor cannot access all parts of memory or chips are not using the same clock, said Lounsbury. These considerations are important because of constraints in memory bandwidth. Languages and operating systems can perform optimizations to address this."The idea here is that we'll see the creation of new sets of tools, whether it's extensions to OSes or new sets of compilers or languages like Java that will bring some of these new capabilities," Lounsbury said.While the project is based around Java, concepts from it could be made to work in other environments, he said. Asked when there might be results from JEOPARD, Lounsbury said the effort is a three-year EC program.Chip vendors could be expected to look closely at the project and incorporate results into their next generations of chips.Contributions from JEOPARD will be to be made to the RTSJ (Real-Time Specification for Java), which focuses on development of portable software in the multi-core embedded space, The Open Group said. Also, JEOPARD will feature development of a platform-independent software development interface for real-time multi-core systems based on RTSJ and Safety-Critical Java. RTSJ is the subject of Java Specification Requests 1 and 282 in the Java Community Process, while Safety-Critical Java is covered in JSR 302.Also participating in JEOPARD are the University of York, FZI, Vienna University of Technology, and the Technical University of Cluj-Napoca. Other participants include industrial manufacturers EADS, RadioLabs, and SkySoft and two embedded systems technology suppliers, aicas and Sysgo.In another effort pertaining to development for multi-core chips, RapidMind in November announced RapidMind Multi-core Development Platform v.30, which seeks to help developers build for these processors.
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Intel is researching technology that weds memory chips to processor cores, and can yield impressive gains in speed and efficiency.
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Processor at 3.8GHz may mark the end of Intel's speed race.
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Blog: Everyone's favorite whipping boy, Intel's Itanium server processor, is still on the road map well into the next decade.
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The glass-encased room inside Intel Corp.&#039;s microchip factory here, with its shiny, metallic surfaces and frigid air, is a world away from the blistering sun and brown earth outside. An army of robots suspended from the vast ceiling glide from one refrigerator-sized machine to the next. Their cargo: thousands of 12-inch silicon platters that form the raw material for Intel&#039;s most sophisticated computer microprocessor to date.
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The CEO of the world's largest chipmaker wants hardware developers thinking about graphics, low-power applications, and Intel's determination not to let AMD get the best of it again.
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New "Tulsa" chip for high-end x86 servers takes on Advanced Micro Devices with onboard cache memory.
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Intel Developer Forum this week will zero in on upcoming chips. Areas for longer-term growth aren't quite so clear.
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Intel exec offers few details about dual-core chips as he talks up new technologies.
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At Intel's recent Developer Forum conference in Beijing, quad-core processing to go was at the top of the list for the laptops of the future.
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One-core UMPC chip acts like a Core 2 Duo Intel has spilled a few more beans about 'Silverthorne', its upcoming 45nm processor for UMPCs and mobile internet devices (MIDs). It's a single-core part that implements HyperThreading (HT) ahead of the technology's implementation later this year in 'Nehalem' next-gen CPUs.â¦
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Intel selects consummate insider as next CEO. Can he take Intel beyond the PC?
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Doubled-up processors were the big news at this year?s Intel Developer Forum. They boost performance without frying your chips ? and are coming your way soon.
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Intel's presentation at a conference next week appears set to confirm many rumored details of the chip's architecture and characteristics.