PLL with variable pulse widths
101226
Best circuit to get an array of signals with the same frequency and edge-synchronizable to a reference but individually controllable duty-cycles?
18428
How can a CPU dynamically change its clock frequency?
121428
How to amplify and offset the voltage in an opamp?
126421
Piecewise smooth rectangle pulse
132950
Scale 30-50 mV signal to 0-5 V range
6765
How can I randomise the output of a redstone circuit?
22696
Faster ways to calculate frequencies and cast from long to wide
81939
How to generate a predetermined number of pulses?
106797
Truth Tables for Digital Circuits
18178
Levels or First Differences, VECM or VAR for Ultimate Impulse Response Functions?
71179
Named blocks to limit variable scope: good idea?
125238
Sampling Rate Passband Signal
145235
What is supposed to happen in Verilog if a signal of one width is assigned to another signal of a different width?
138452
How can I control a sequence of outputs via a single input?
93225
How to generate a 555 fixed time delay even if trigger button is held on?
72916
How to turn a pulsed signal into a continuous one?
54572
555 timer in astable mode: How can I achieve longer low output than high?