code:
% X60

Native gpu initialization ('native graphics') which replaces the
proprietary VGA Option ROM ('[Video
BIOS](https://en.wikipedia.org/wiki/Video_BIOS)' or 'VBIOS'), all
known LCD panels are currently compatible:

To find what LCD panel you have, see:
[../misc/\#get\_edid\_panelname](../misc/#get_edid_panelname).

-   TMD-Toshiba LTD121ECHB: \#
-   CMO N121X5-L06: \#
-   Samsung LTN121XJ-L07: \#
-   BOE-Hydis HT121X01-101: \#

You can remove an X61/X61s motherboard from the chassis and install an
X60/X60s motherboard in it's place (for flashing libreboot). The
chassis is mostly identical and the motherboards are the same
shape/size.

The X60 typically comes with an Intel wifi chipset which does not work
at all without proprietary firmware, and while Lenovo BIOS is running
the system will refuse to boot if you replace the card. Fortunately it
is very easily replaced; just remove the card and install another one
**after** libreboot is installed. See
[\#recommended\_wifi](#recommended_wifi) for replacements.

List of supported ThinkPad X60 Tablets
--------------------------------------

Native gpu initialization ('native graphics') which replaces the
proprietary VGA Option ROM ('[Video
BIOS](https://en.wikipedia.org/wiki/Video_BIOS)' or 'VBIOS').

To find what LCD panel you have, see:
[../misc/\#get\_edid\_panelname](../misc/#get_edid_panelname).

There are 5 known LCD panels for the X60 Tablet:

-   **X60T XGA (1024x768):**
    -   BOE-Hydis HV121X03-100 (works)
    -   Samsung LTN121XP01 (does not work. blank screen)
    -   BOE-Hydis HT12X21-351 (does not work. blank screen)
-   **X60T SXGA+ (1400x1050):**
    -   BOE-Hydis HV121P01-100 (works)
    -   BOE-Hydis HV121P01-101 (works)

Most X60Ts only have digitizer (pen), but some have finger (touch)
aswell as pen; finger/multitouch doesn't work, only digitizer (pen)
does.

You can remove an X61/X61s motherboard from the chassis and install an
X60/X60s motherboard in its place (for flashing libreboot). The chassis
is mostly identical and the motherboards are the same shape/size. **It
is unknown if the same applies between the X60 Tablet and the X61
Tablet**.

The X60 Tablet typically comes with an Intel wifi chipset which does not
work at all without proprietary firmware, and while Lenovo BIOS is
running the system will refuse to boot if you replace the card.
Fortunately it is very easily replaced; just remove the card and install
another one **after** libreboot is installed. See
[\#recommended\_wifi](#recommended_wifi) for replacements.

A user with a X60T that has digitizer+finger support, reported that they
could get finger input working. They used linuxwacom at git tag
0.25.99.2 and had the following in their xorg.conf:

    # Now, for some reason (probably a bug in linuxwacom),
    # the 'Touch=on' directive gets reset to 'off'.
    # So you'll need to do
    # $ xsetwacom --set WTouch Touch on
    #
    # tested with linuxwacom git 42a42b2a8636abc9e105559e5dea467163499de7

    Section "Monitor"
         Identifier             "<default monitor>"
         DisplaySize     245 184
    EndSection

    Section "Screen"
         Identifier "Default Screen Section"
         Monitor    "<default monitor<"
    EndSection

    Section "InputDevice"
         Identifier  "WTouch"
         Driver      "wacom"
         Option      "Device" "/dev/ttyS0"
    #    Option      "DebugLevel" "12"
         Option      "BaudRate" "38400"
         Option      "Type" "touch"
         Option      "Touch" "on"
         Option      "Gesture" "on"
         Option      "ForceDevice" "ISDV4"
    #    Option      "KeepShape" "on"
         Option      "Mode" "Absolute"
         Option      "RawSample" "2"
    #    Option      "TPCButton" "off"
         Option      "TopX" "17"
         Option      "TopY" "53"
         Option      "BottomX" "961"
         Option      "BottomY" "985"
    EndSection

    Section "ServerLayout"
      Identifier    "Default Layout"
      Screen        "Default Screen Section"
      InputDevice   "WTouch" "SendCoreEvents"
    EndSection

% ThinkPad X60: Recovery guide

This section documents how to recover from a bad flash that prevents
your ThinkPad X60 from booting.

Table of Contents
=================

-   Types of brick:
    -   [Brick type 1: bucts not reset](#bucts_brick)
    -   [Brick type 2: bad rom (or user error), system won't
        boot](#recovery)

Brick type 1: bucts not reset. {#bucts_brick}
==============================

You still have Lenovo BIOS, or you had libreboot running and you flashed
another ROM; and you had bucts 1 set and the ROM wasn't dd'd.\* or if
Lenovo BIOS was present and libreboot wasn't flashed.\
\
In this case, unbricking is easy: reset BUC.TS to 0 by removing that
yellow cmos coin (it's a battery) and putting it back after a minute or
two:\
![](../images/x60_unbrick/0004.jpg)\
\
\*Those dd commands should be applied to all newly compiled X60 ROM
images (the ROM images in libreboot binary archives already have this
applied!):\
dd if=coreboot.rom of=top64k.bin bs=1 skip=\$\[\$(stat -c %s
coreboot.rom) - 0x10000\] count=64k\
dd if=coreboot.rom bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x20000\]
count=64k | hexdump\
dd if=top64k.bin of=coreboot.rom bs=1 seek=\$\[\$(stat -c %s
coreboot.rom) - 0x20000\] count=64k conv=notrunc\
(doing this makes the ROM suitable for use when flashing a system that
still has Lenovo BIOS running, using those instructions:
<http://www.coreboot.org/Board:lenovo/x60/Installation>.

bad rom (or user error), system won't boot {#recovery}
===========================================

In this scenario, you compiled a ROM that had an incorrect
configuration, or there is an actual bug preventing your system from
booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash
while Lenovo BIOS was running. In any case, your system is bricked and
will not boot at all.

"Unbricking" means flashing a known-good (working) ROM. The problem:
you can't boot the system, making this difficult. In this situation,
external hardware (see hardware requirements above) is needed which can
flash the SPI chip (where libreboot resides).

Remove those screws:\
![](../images/x60_unbrick/0000.jpg)

Push the keyboard forward (carefully):\
![](../images/x60_unbrick/0001.jpg)

Lift the keyboard up and disconnect it from the board:\
![](../images/x60_unbrick/0002.jpg)

Grab the right-hand side of the chassis and force it off (gently) and
pry up the rest of the chassis:\
![](../images/x60_unbrick/0003.jpg)

You should now have this:\
![](../images/x60_unbrick/0004.jpg)

Disconnect the wifi antenna cables, the modem cable and the speaker:\
![](../images/x60_unbrick/0005.jpg)

Unroute the cables along their path, carefully lifting the tape that
holds them in place. Then, disconnect the modem cable (other end) and
power connection and unroute all the cables so that they dangle by the
monitor hinge on the right-hand side:\
![](../images/x60_unbrick/0006.jpg)

Disconnect the monitor from the motherboard, and unroute the grey
antenna cable, carefully lifting the tape that holds it into place:\
![](../images/x60_unbrick/0008.jpg)

Carefully lift the remaining tape and unroute the left antenna cable so
that it is loose:\
![](../images/x60_unbrick/0009.jpg)

Remove the screw that is highlighted (do NOT remove the other one; it
holds part of the heatsink (other side) into place):\
![](../images/x60_unbrick/0011.jpg)

Remove those screws:\
![](../images/x60_unbrick/0012.jpg)

Carefully remove the plate, like so:\
![](../images/x60_unbrick/0013.jpg)

Remove the SATA connector:\
![](../images/x60_unbrick/0014.jpg)

Now remove the motherboard (gently) and cast the lcd/chassis aside:\
![](../images/x60_unbrick/0015.jpg)

Lift back that tape and hold it with something. Highlighted is the SPI
flash chip:\
![](../images/x60_unbrick/0016.jpg)

Now wire up the BBB and the Pomona with your PSU.\
Refer to [bbb\_setup.html](bbb_setup.html) for how to setup the BBB for
flashing.\
**Note, the guide mentions a 3.3v DC PSU but you don't need this on the
X60: if you don't have or don't want to use an external PSU, then make
sure not to connect the 3.3v leads mentioned in the guide; instead,
connect the AC adapter (the one that normally charges your battery) so
that the board has power (but don't boot it up)**
![](../images/x60_unbrick/0017.jpg)\
Correlate the following with the BBB guide linked above:

    POMONA 5250:
    ===  golden finger and wifi switch ====
     18              -       - 1
     22              -       - NC                    ---------- audio jacks are on this end
     NC              -       - 21
     3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
    ===  CPU fan ===
    This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

Connecting the BBB and pomona (in this image, an external 3.3v DC PSU
was used):\
![](images/x60/th_bbb_flashing.jpg)

Flashrom binaries for ARM (tested on a BBB) are distributed in
libreboot\_util. Alternatively, libreboot also distributes flashrom
source code which can be built.

SSH'd into the BBB:\
\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w
yourrom.rom**

It should be **Verifying flash\... VERIFIED** at the end. If flashrom
complains about multiple flash chip definitions detected, then choose
one of them following the instructions in the output.

Remove the programmer and put it away somewhere. Put back the tape and
press firmly over it:\
![](../images/x60_unbrick/0026.jpg)

Your empty chassis:\
![](../images/x60_unbrick/0027.jpg)

Put the motherboard back in:\
![](../images/x60_unbrick/0028.jpg)

Reconnect SATA:\
![](../images/x60_unbrick/0029.jpg)

Put the plate back and re-insert those screws:\
![](../images/x60_unbrick/0030.jpg)

Re-route that antenna cable around the fan and apply the tape:\
![](../images/x60_unbrick/0031.jpg)

Route the cable here and then (not shown, due to error on my part)
reconnect the monitor cable to the motherboard and re-insert the
screws:\
![](../images/x60_unbrick/0032.jpg)

Re-insert that screw:\
![](../images/x60_unbrick/0033.jpg)

Route the black antenna cable like so:\
![](../images/x60_unbrick/0034.jpg)

Tuck it in neatly like so:\
![](../images/x60_unbrick/0035.jpg)

Route the modem cable like so:\
![](../images/x60_unbrick/0036.jpg)

Connect modem cable to board and tuck it in neatly like so:\
![](../images/x60_unbrick/0037.jpg)

Route the power connection and connect it to the board like so:\
![](../images/x60_unbrick/0038.jpg)

Route the antenna and modem cables neatly like so:\
![](../images/x60_unbrick/0039.jpg)

Connect the wifi antenna cables. At the start of the tutorial, this
system had an Intel wifi chip. Here you see I've replaced it with an
Atheros AR5B95 (supports 802.11n and can be used without blobs):\
![](../images/x60_unbrick/0040.jpg)

Connect the modem cable:\
![](../images/x60_unbrick/0041.jpg)

Connect the speaker:\
![](../images/x60_unbrick/0042.jpg)

You should now have this:\
![](../images/x60_unbrick/0043.jpg)

Re-connect the upper chassis:\
![](../images/x60_unbrick/0044.jpg)

Re-connect the keyboard:\
![](../images/x60_unbrick/0045.jpg)

Re-insert the screws that you removed earlier:\
![](../images/x60_unbrick/0046.jpg)

Power on!\
![](../images/x60_unbrick/0047.jpg)

Operating system:\
![](../images/x60_unbrick/0049.jpg)

Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\
This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt)
% ThinkPad X60 Tablet: Recovery guide

This section documents how to recover from a bad flash that prevents
your ThinkPad X60 Tablet from booting.

Table of Contents
-----------------

-   Types of brick:
    -   [Brick type 1: bucts not reset](#bucts_brick)
    -   [Brick type 2: bad rom (or user error), system won't
        boot](#recovery)

Brick type 1: bucts not reset. {#bucts_brick}
==============================

You still have Lenovo BIOS, or you had libreboot running and you flashed
another ROM; and you had bucts 1 set and the ROM wasn't dd'd.\* or if
Lenovo BIOS was present and libreboot wasn't flashed.\
\
In this case, unbricking is easy: reset BUC.TS to 0 by removing that
yellow cmos coin (it's a battery) and putting it back after a minute or
two:\
![](../images/x60t_unbrick/0008.JPG)\
\
\*Those dd commands should be applied to all newly compiled X60 ROM
images (the ROM images in libreboot binary archives already have this
applied!):\
dd if=coreboot.rom of=top64k.bin bs=1 skip=\$\[\$(stat -c %s
coreboot.rom) - 0x10000\] count=64k\
dd if=coreboot.rom bs=1 skip=\$\[\$(stat -c %s coreboot.rom) - 0x20000\]
count=64k | hexdump\
dd if=top64k.bin of=coreboot.rom bs=1 seek=\$\[\$(stat -c %s
coreboot.rom) - 0x20000\] count=64k conv=notrunc\
(doing this makes the ROM suitable for use when flashing a system that
still has Lenovo BIOS running, using those instructions:
<http://www.coreboot.org/Board:lenovo/x60/Installation>.

bad rom (or user error), system won't boot {#recovery}
===========================================

In this scenario, you compiled a ROM that had an incorrect
configuration, or there is an actual bug preventing your system from
booting. Or, maybe, you set BUC.TS to 0 and shut down after first flash
while Lenovo BIOS was running. In any case, your system is bricked and
will not boot at all.

"Unbricking" means flashing a known-good (working) ROM. The problem:
you can't boot the system, making this difficult. In this situation,
external hardware (see hardware requirements above) is needed which can
flash the SPI chip (where libreboot resides).

![](../images/x60t_unbrick/0000.JPG)

Remove those screws:\
![](../images/x60t_unbrick/0001.JPG)

Remove the HDD:\
![](../images/x60t_unbrick/0002.JPG)

Push keyboard forward to loosen it:\
![](../images/x60t_unbrick/0003.JPG)

Lift:\
![](../images/x60t_unbrick/0004.JPG)

Remove those:\
![](../images/x60t_unbrick/0005.JPG)

![](../images/x60t_unbrick/0006.JPG)

Also remove that (marked) and unroute the antenna cables:\
![](../images/x60t_unbrick/0007.JPG)

For some X60T laptops, you have to unroute those too:\
![](../images/x60t_unbrick/0010.JPG)

Remove the LCD extend board screws. Also remove those screws (see blue
marks) and remove/unroute the cables and remove the metal plate:\
![](../images/x60t_unbrick/0008.JPG)

Remove that screw and then remove the board:\
![](../images/x60t_unbrick/0009.JPG)

Now wire up the BBB and the Pomona with your PSU.\
Refer to [bbb\_setup.html](bbb_setup.html) for how to setup the BBB for
flashing.\
**Note, the guide mentions a 3.3v DC PSU but you don't need this on the
X60 Tablet: if you don't have or don't want to use an external PSU,
then make sure not to connect the 3.3v leads mentioned in the guide;
instead, connect the AC adapter (the one that normally charges your
battery) so that the board has power (but don't boot it up)**
![](../images/x60t_unbrick/0011.JPG)\
Correlate the following with the BBB guide linked above:

    POMONA 5250:
    ===  golden finger and wifi switch ====
     18              -       - 1
     22              -       - NC                    ---------- audio jacks are on this end
     NC              -       - 21
     3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
    ===  CPU fan ===
    This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

Connecting the BBB and pomona (in this image, an external 3.3v DC PSU
was used):\
![](images/x60/th_bbb_flashing.jpg)

Flashrom binaries for ARM (tested on a BBB) are distributed in
libreboot\_util. Alternatively, libreboot also distributes flashrom
source code which can be built.

SSH'd into the BBB:\
\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w
yourrom.rom**

It should be **Verifying flash\... VERIFIED** at the end. If flashrom
complains about multiple flash chip definitions detected, then choose
one of them following the instructions in the output.

Reverse the steps to re-assemble your system.

Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\
This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt)


code:
Options +Indexes
IndexOptions FancyIndexing FoldersFirst NameWidth=* DescriptionWidth=*

license: mit


code:
% Libreboot documentation

Information about this release can be found at [release.html](release.html).
Always check [libreboot.org](/) for updates.

Answers to [frequently asked questions about
Libreboot](https://libreboot.org/faq/).

Libreboot is compatible with GNU+Linux and several BSD systems. For BSD, refer
to [the libreboot FAQ](https://libreboot.org/faq/#bsd).  We wish to merge
instructions into the official libreboot documentation, if someone will provide
it. We do have some instructions now for NetBSD, FreeBSD and OpenBSD, but they
are still incomplete. See [bsd/](bsd/).

Installing libreboot
====================

-   [What systems can I use libreboot on?](hcl/)

Installing operating systems
============================

-   [How to install GNU+Linux on a libreboot system](gnulinux/)
-   [How to install BSD on a libreboot system](bsd/)

Information for developers
==========================

-   [How to compile the libreboot source code](git/)
-   [Depthcharge payload](depthcharge/)
-   [GRUB payload](grub/)

Other information
=================

-   [Miscellaneous](misc/)

About the libreboot project
===========================

Libreboot is a [free](https://en.wikipedia.org/wiki/Free_software) and Open
Source BIOS or UEFI replacement, initialising the hardware and booting your
operating system. We are a member of the [Peers Community](https://peers.community/)
project, an organisation that supports Free Software.

Libreboot is a [coreboot](http://coreboot.org/) distribution (distro)
with proprietary software removed, intended to be a
[free](https://en.wikipedia.org/wiki/Free_software) (libre) 'BIOS'
replacement for your computer. The project is aimed at users, attempting
to make coreboot as easy to use as possible.

Libreboot has many practical advantages over proprietary boot firmware,
such as faster boot speeds and better security. You can [install
GNU+Linux with encrypted /boot/](gnulinux/), [verify GPG signatures on
your kernel](http://www.coreboot.org/GRUB2#signed_kernels), put a kernel
in the flash chip and more.

The libreboot project has three main goals:
-------------------------------------------

-   ***Recommend and distribute only free software***. Coreboot
    distributes certain pieces of proprietary software which is needed
    on some systems. Examples can include things like CPU microcode
    updates, memory initialization blobs and so on. The coreboot project
    sometimes recommends adding more blobs which it does not distribute,
    such as the Video BIOS or Intel's *Management Engine*. However, a
    lot of dedicated and talented individuals in coreboot work hard to
    replace these blobs whenever possible.
-   ***Support as much hardware as possible!*** Libreboot supports less
    hardware than coreboot, because most systems from coreboot still
    require certain proprietary software to work properly. Libreboot is
    an attempt to support as much hardware as possible, without any
    proprietary software.
-   ***Make coreboot easy to use***. Coreboot is notoriously difficult
    to install, due to an overall lack of user-focussed documentation
    and support. Most people will simply give up before attempting to
    install coreboot.

Libreboot attempts to bridge this divide, making sure that everything from
building to installing coreboot is automated, as much as is feasibly possible.
Secondly, the project produces documentation aimed at non-technical users.
Thirdly, the project attempts to provide excellent user support via mailing
lists and IRC.

Libreboot already comes with a payload (GRUB), flashrom and other
needed parts. Everything is fully integrated, in a way where most of
the complicated steps that are otherwise required, are instead done
for the user in advance.

You can download ROM images for your libreboot system and install
them, without having to build anything from source. The build system
is also fully automated, so building from source is easy if you
wanted to do that (for whatever reason).

Libreboot is a coreboot distribution, not a coreboot fork
---------------------------------------------------------

Libreboot is not a fork of coreboot. Every so often, the project
re-bases on the latest version of coreboot, with the number of custom
patches in use minimized.

All new coreboot development should be done in coreboot (upstream), not
libreboot! Libreboot is about deblobbing and packaging coreboot in a
user-friendly way, where most work is already done for the user.

For example, if you wanted to add a new board to libreboot, you should
add it to coreboot first. Libreboot will automatically receive your code
at a later date, when it updates itself.

The deblobbed coreboot tree used in libreboot is referred to as
*coreboot-libre*, to distinguish it as a component of *libreboot*.

Libreboot is a 'stable' version of coreboot
---------------------------------------------

-   Coreboot uses the [rolling
release](https://en.wikipedia.org/wiki/Rolling_release) model, which
means that it is not guaranteed to be stable, or to even work at all
on a given day. Coreboot does have a strict code review process, but
being such a large project with so many contributors, regressions
are always possible.
-   Libreboot freezes on a particular revision of coreboot, making sure
that everything works properly, making fixes on top of that and
repeating this during each subsequent update to a later version of
coreboot. By doing this, it provides a stronger guarantee to the
user that the firmware will be reliable, and not break their system.

How do I know what version I'm running?
========================================

If you are at least 127 commits after release 20150518 (commit message
*build/roms/helper: add version information to CBFS*) (or you have any
**upstream** stable release of libreboot after 20150518), then you can
press C at the GRUB console, and use this command to find out what
version of libreboot you have:\
**cat (cbfsdisk)/lbversion**\
This will also work on non-release images (the version string is
automatically generated, using *git describe --tags HEAD*), built from
the git repository. A file named *version* will also be included in the
archives that you downloaded (if you are using release archives).

If it exists, you can also extract this *lbversion* file by using the
*cbfstool* utility which libreboot includes, from a ROM image that you
either dumped or haven't flashed yet. In your distribution, run
cbfstool on your ROM image (*libreboot.rom*, in this example):

    $ ./cbfstool libreboot.rom extract -n lbversion -f lbversion

You will now have a file, named *lbversion*, which you can read in
whatever program it is that you use for reading/writing text files.

For git, it's easy. Just check the git log.

For releases on or below 20150518, or snapshots generated from the git
repository below 127 commits after 20150518, you can find a file named
*commitid* inside the archives. If you are using pre-built ROM images
from the libreboot project, you can press C in GRUB for access to the
terminal, and then run this command:\
**lscoreboot**\
You may find a date in here, detailing when that ROM image was built.
For pre-built images distributed by the libreboot project, this is a
rough approximation of what version you have, because the version
numbers are dated, and the release archives are typically built on the
same day as the release; you can correlate that with the release
information in [release.html](release.html).

For 20160818, note that the lbversion file was missing from CBFS on GRUB
images. You can still find out what libreboot version you have by
comparing checksums of image dumps (with the descriptor blanked out with
00s, and the same done to the ROMs from the release archive, if you are
on a GM45 laptop).

There may also be a ChangeLog file included in your release archive, so
that you can look in there to figure out what version you have.

You can also check the documentation that came with your archives, and
in *docs/release.html* will be the information about the version of
libreboot that you are using.

Generally speaking, it is advisable to use the latest version of
libreboot.

Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>\
This page is available under the [CC BY SA 4.0](cc-by-sa-4.0.txt)


code:
% How to program an SPI flash chip with the BeagleBone Black or Teensy 3.1

This document exists as a guide for reading from or writing to an SPI
flash chip with the BeagleBone Black, using the
[flashrom](http://flashrom.org/Flashrom) software. A BeagleBone Black,
rev. C was used when creating this guide, but earlier revisions may also
work.

**NOTE: this documentation may be outdated, and discusses configuring
SPI flashing on the default Debian system that the BBB sometimes comes
with. If you want an easier time, just use [BBB
ScrewDriver](https://www.coreboot.org/BBB_screwdriver) which comes
pre-configured.**

**This guide is written for Debian Wheezy 7.5, which is what came on the
BBB at the time this guide was written. This one:
<https://debian.beagleboard.org/images/bone-debian-7.8-lxde-4gb-armhf-2015-03-01-4gb.img.xz>**

There was no justification for a further section for the Teensy. Simply
refer to [this page on
flashrom.org](https://www.flashrom.org/Teensy_3.1_SPI_%2B_LPC/FWH_Flasher#ISP_Usage)
for information about how to set it up, and correlate that with the pins
on the SPI flash chip as per other guides in the libreboot documentation
for each board. At the time of writing, the teensy is tested for
flashing on the ThinkPad X200, but it should work for other targets.
here is a photo of the setup for the teensy:
<http://h5ai.swiftgeek.net/IMG_20160601_120855.jpg>

You may consider using [BBB
ScrewDriver](https://www.coreboot.org/BeagleBone_Black_-_screwdriver).

Onto the Beaglebone black\...

Hardware requirements
=====================

Shopping list (pictures of this hardware is shown later):

-   A [Flashrom](http://flashrom.org)-compatible external SPI
    programmer: **BeagleBone Black**, sometimes referred to as 'BBB',
    (rev. C) is highly recommended. You can buy one from
    [Adafruit](https://www.adafruit.com) (USA),
    [ElectroKit](http://electrokit.com) (Sweden) or any of the
    distributors listed [here](http://beagleboard.org/black) (look below
    'Purchase'). We recommend this product because we know that it
    works well for our purposes and doesn't require any non-free
    software.

-   Electrical/insulative tape: cover the entire bottom surface of the
    BBB (the part that rests on a surface). This is important, when
    placing the BBB on top of a board so that nothing shorts. Most
    hardware/electronics stores have this. Optionally, you can use the
    bottom half of a [hammond plastic
    enclosure](http://www.hammondmfg.com/1593HAM.htm#BeagleBoneBlack).
-   Clip for connecting to the flash chip: if you have a SOIC-16 flash
    chip (16 pins), you will need the **Pomona 5252** or equivalent. For
    SOIC-8 flash chips (8 pins), you will need the **Pomona 5250** or
    equivalent. Do check which chip you have, before ordering a clip.
    Also, you might as well buy two clips or more since they break
    easily. [Farnell element 14](http://farnell.com/) sells these and
    ships to many countries. Some people find these clips difficult to
    get hold of, especially in South America. If you know of any good
    suppliers, please contact the libreboot project with the relevant
    information. **If you can't get hold of a pomona clip, some other
    clips might work, e.g. 3M, but they are not always reliable. You can
    also directly solder the wires to the chip, if that suits you; the
    clip is just for convenience, really.**
-   **External 3.3V DC power supply**, for powering the flash chip: an
    ATX power supply / PSU (common on Intel/AMD desktop computers) will
    work for this. A lab PSU (DC) will also work (adjusted to 3.3V).
    -   Getting a multimeter might be worthwhile, to verify that it's
        supplying 3.3V.
-   **External 5V DC power supply** (barrel connector), for powering the
    BBB: the latter can have power supplied via USB, but a dedicated
    power supply is recommended. These should be easy to find in most
    places that sell electronics. **OPTIONAL. Only needed if not
    powering with the USB cable, or if you want to use [EHCI
    debug](../misc/bbb_ehci.html)**.
-   **Pin header / jumper cables** (2.54mm / 0.1" headers): you should
    get male--male, male--female and female--female cables in 10cm
    size. Just get a load of them. Other possible names for these
    cables/wires/leads are as follows:
    -   flying leads
    -   breadboard cables (since they are often used on breadboards).
    -   You might also be able to make these cables yourself.

    [Adafruit](https://www.adafruit.com) sell them, as do many others.
    **Some people find them difficult to buy. Please contact the
    libreboot project if you know of any good sellers.** You might also
    be able to make these cables yourself. For PSU connections, using
    long cables, e.g. 20cm, is fine, and you can extend them longer than
    that if needed.
-   **Mini USB A-B cable** (the BeagleBone probably already comes with
    one.) - **OPTIONAL - only needed for [EHCI
    debug](../misc/bbb_ehci.html) or for serial/ssh access without
    ethernet cable (g\_multi kernel module)**
-   **FTDI TTL cable or debug board**: used for accessing the serial
    console on the BBB. [This
    page](http://elinux.org/Beagleboard:BeagleBone_Black_Serial)
    contains a list. **OPTIONAL\---only needed for serial console on
    the BBB, if not using SSH via ethernet cable.**

Setting up the 3.3V DC PSU
==========================

ATX PSU pinouts can be read on [this Wikipedia
page](https://en.wikipedia.org/wiki/Power_supply_unit_%28computer%29#Wiring_diagrams).

You can use pin 1 or 2 (orange wire) on a 20-pin or 24-pin ATX PSU for
3.3V, and any of the ground/earth sources (black cables) for ground.
Short PS\_ON\# / Power on (green wire; pin 16 on 24-pin ATX PSU, or pin
14 on a 20-pin ATX PSU) to a ground (black; there is one right next to
it) using a wire/paperclip/jumper, then power on the PSU by grounding
PS\_ON\# (this is also how an ATX motherboard turns on a PSU).

**DO \*\*NOT\*\* use pin 4, 6, do \*\*NOT\*\* use pin 19 or 20 (on a
20-pin ATX PSU), and DO \*\*NOT\*\* use pin 21, 22 or 23 (on a 24-pin
ATX PSU). Those wires (the red ones) are 5V, and they \*\*WILL\*\* kill
your flash chip. \*\*\*NEVER\*\*\* supply more than 3.3V to your flash
chip (that is, if it's a 3.3V flash chip; 5V and 1.8V SPI flash chips
do exist, but they are rare. Always check what voltage your chip takes.
Most of them take 3.3V).**

You only need one 3.3V supply and one ground for the flash chip, after
grounding PS\_ON\#.

The male end of a 0.1" or 2.54mm header cable is not thick enough to
remain permanently connected to the ATX PSU on its own. When connecting
header cables to the connector on the ATX PSU, use a female end attached
to a thicker piece of wire (you could use a paper clip), or wedge the
male end of the jumper cable into the sides of the hole in the
connector, instead of going through the centre.

Here is an example set up:\
![](images/x200/psu33.jpg "Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net> see license notice at the end of this document")

Accessing the operating system on the BBB
=========================================

The operating system on your BBB will probably have an SSH daemon
running where the root account has no password. Use SSH to access the
operating system and set a root password. By default, the OS on your BBB
will most likely use DHCP, so it should already have an IP address.

You will also be using the OS on your BBB for programming an SPI flash
chip.

Alternatives to SSH (in case SSH fails)
---------------------------------------

You can also use a serial FTDI debug board with GNU Screen, to access
the serial console.
    # screen /dev/ttyUSB0 115200
Here are some example photos:\
![](images/x200/ftdi.jpg) ![](images/x200/ftdi_port.jpg)\

You can also connect the USB cable from the BBB to another computer and
a new network interface will appear, with its own IP address. This is
directly accessible from SSH, or screen:
    # screen /dev/ttyACM0 115200

You can also access the uboot console, using the serial method instead
of SSH.

Setting up spidev on the BBB
============================

Log on as root on the BBB, using either SSH or a serial console as
defined in [\#bbb\_access](#bbb_access). Make sure that you have
internet access on your BBB.

Follow the instructions at
<http://elinux.org/BeagleBone_Black_Enable_SPIDEV#SPI0> up to (and
excluding) the point where it tells you to modify uEnv.txt

You need to update the software on the BBB first. If you have an
element14 brand BBB (sold by Premier Farnell plc. stores like Farnell
element14, Newark element14, and Embest), you may need to [work around a
bug](https://groups.google.com/forum/?_escaped_fragment_=msg/beagleboard/LPjCn4LEY2I/alozBGsbTJMJ#!msg/beagleboard/LPjCn4LEY2I/alozBGsbTJMJ)
in the LED aging init script before you can update your software. If you
don't have a file named /etc/init.d/led\_aging.sh, you can skip this
step and update your software as described below. Otherwise, replace the
contents of this file with:

    #!/bin/sh -e
    ### BEGIN INIT INFO
    # Provides:          led_aging.sh
    # Required-Start:    $local_fs
    # Required-Stop:     $local_fs
    # Default-Start:     2 3 4 5
    # Default-Stop:      0 1 6
    # Short-Description: Start LED aging
    # Description:       Starts LED aging (whatever that is)
    ### END INIT INFO

    x=$(/bin/ps -ef | /bin/grep "[l]ed_acc")
    if [ ! -n "$x" -a -x /usr/bin/led_acc ]; then
        /usr/bin/led_acc &
    fi

Run **apt-get update** and **apt-get upgrade** then reboot the BBB,
before continuing.
Check that the firmware exists:

    # ls /lib/firmware/BB-SPI0-01-00A0.\*
Output:

    /lib/firmware/BB-SPI0-01-00A0.dtbo

Then:

    # echo BB-SPI0-01 > /sys/devices/bone\_capemgr.\*/slots
    # cat /sys/devices/bone\_capemgr.\*/slots
Output:

     0: 54:PF---
     1: 55:PF---
     2: 56:PF---
     3: 57:PF---
     4: ff:P-O-L Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G
     5: ff:P-O-L Bone-Black-HDMI,00A0,Texas Instrument,BB-BONELT-HDMI
     7: ff:P-O-L Override Board Name,00A0,Override Manuf,BB-SPI0-01

Verify that the spidev device now exists:

    # ls -al /dev/spid\*
Output:

    crw-rw---T 1 root spi 153, 0 Nov 19 21:07 /dev/spidev1.0

Now the BBB is ready to be used for flashing. Make this persist across
reboots:\
In /etc/default/capemgr add **CAPE=BB-SPI0-01** at the end (or change
the existing **CAPE=** entry to say that, if an entry already exists.

Get flashrom from the libreboot\_util release archive, or build it from
libreboot\_src/git if you need to. An ARM binary (statically compiled)
for flashrom exists in libreboot\_util releases. Put the flashrom binary
on your BBB.

You may also need ich9gen, if you will be flashing an ICH9-M laptop
(such as the X200). Get it from libreboot\_util, or build it from
libreboot\_src, and put the ARM binary for it on your BBB.

Finally, get the ROM image that you would like to flash and put that on
your BBB.

Now test flashrom:

    # ./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512
Output:

    Calibrating delay loop... OK.
    No EEPROM/flash device found.
    Note: flashrom can never write if the flash chip isn't found automatically.

This means that it's working (the clip isn't connected to any flash
chip, so the error is fine).

Connecting the Pomona 5250/5252
===============================

Use this image for reference when connecting the pomona to the BBB:
<http://beagleboard.org/Support/bone101#headers> (D0 = MISO or connects
to MISO).

The following shows how to connect clip to the BBB (on the P9 header),
for SOIC-16 (clip: Pomona 5252):

     NC              -       - 21
     1               -       - 17
     NC              -       - NC
     NC              -       - NC
     NC              -       - NC
     NC              -       - NC
     18              -       - 3.3V (PSU)
     22              -       - NC - this is pin 1 on the flash chip
    This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

    You may also need to connect pins 1 and 9 (tie to 3.3V supply). These are HOLD# and WP#.
    On some systems they are held high, if the flash chip is attached to the board.
    If you're flashing a chip that isn't connected to a board, you'll almost certainly
    have to connect them.

    SOIC16 pinout (more info available online, or in the datasheet for your flash chip):
    HOLD    1-16    SCK
    VDD 2-15    MOSI
    N/C 3-14    N/C
    N/C 4-13    N/C
    N/C 5-12    N/C
    N/C 6-11    N/C
    SS  7-10    GND
    MISO    8-9 WP

The following shows how to connect clip to the BBB (on the P9 header),
for SOIC-8 (clip: Pomona 5250):

     18              -       - 1
     22              -       - NC
     NC              -       - 21
     3.3V (PSU)      -       - 17 - this is pin 1 on the flash chip
    This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

    You may also need to connect pins 3 and 7 (tie to 3.3V supply). These are HOLD# and WP#.
    On some systems they are held high, if the flash chip is attached to the board.
    If you're flashing a chip that isn't connected to a board, you'll almost certainly
    have to connect them.

    SOIC8 pinout (more info available online, or in the datasheet for your flash chip):
    SS  1-8 VDD
    MISO    2-7 HOLD
    WP  3-6 SCK
    GND 4-5 MOSI

**NC = no connection**

**DO NOT connect 3.3V (PSU) yet. ONLY connect this once the pomona is
connected to the flash chip.**

**You also need to connect the BLACK wire (ground/earth) from the 3.3V
PSU to pin 2 on the BBB (P9 header). It is safe to install this now
(that is, before you connect the pomona to the flash chip); in fact, you
should.**

if you need to extend the 3.3v psu leads, just use the same colour M-F
leads, **but** keep all other leads short (10cm or less)

You should now have something that looks like this:\
![](images/x200/5252_bbb0.jpg) ![](images/x200/5252_bbb1.jpg)

Notes about stability {#stability}
=====================

<http://flashrom.org/ISP> is what we typically do in libreboot, though
not always. That page has some notes about using resistors to affect
stability. Currently, we use spispeed=512 (512kHz) but it is possible to
use higher speeds while maintaining stability.

tty0\_ in \#libreboot was able to get better flashing speeds with the
following configuration:

-   "coax" with 0.1 mm core and aluminum foley (from my kitchen), add
    100 Ohm resistors (serial)
-   put heatshrink above the foley, for: CS, CLK, D0, D1
-   Twisted pair used as core (in case more capacitors are needed)
-   See this image: <http://i.imgur.com/qHGxKpj.jpg>
-   He was able to flash at 50MHz (lower speeds are also fine).

Copyright © 2014, 2015 Leah Rowe <info@minifree.org>\
Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net>\
Copyright © 2015 Albin Söderqvist\
This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt)


code:
% Installing libreboot

This section relates to installing libreboot on supported targets.

NOTE: if running flashrom -p internal for software based flashing, and
you get an error related to /dev/mem access, you should reboot with
iomem=relaxed kernel parameter before running flashrom, or use a kernel
that has CONFIG\_STRICT\_DEVMEM not enabled.

[Back to previous index](../)

General information
-------------------

-   [Information about libreboot ROM images](#rom)

Flashing via software methods, on system:
-----------------------------------------

-   [How to update or install libreboot on all systems](#flashrom)

Setting up programmers, for external flashing via hardware method
-----------------------------------------------------------------

-   [How to program an SPI flash chip with the BeagleBone
    Black](bbb_setup.html)
-   [How to program an SPI flash chip with the Raspberry
    Pi](rpi_setup.html)

Information about libreboot ROM images {#rom}
======================================

Libreboot distributes pre-compiled ROM images, built from the libreboot
source code. These images are provided for user convenience, so that
they don't have to build anything from source on their own.

The ROM images in each archive use the following at the end of the file
name, if they are built with the GRUB payload:
**\_*keymap*\_*mode*.rom**

Available *modes*: **vesafb** or **txtmode**. The *vesafb* ROM images
are recommended, in most cases; *txtmode* ROM images come with
MemTest86+, which requires text-mode instead of the usual framebuffer
used by coreboot native graphics initialization.

*keymap* can be one of several keymaps that keyboard supports (there are
quite a few), which affects the keyboard layout configuration that is
used in GRUB. It doesn't matter which ROM image you choose here, as far
as the keymap in GNU+Linux is concerned.

Keymaps are named appropriately according to each keyboard layout
support in GRUB. To learn how these keymaps are created, see
[../grub/\#grub\_keyboard](../grub/#grub_keyboard)

QEMU
----

Libreboot comes with ROM images built for QEMU, by default:

Examples of how to use libreboot ROM images in QEMU:

-   \$ **qemu-system-i386 -M q35 -m 512 -bios
    qemu\_q35\_ich9\_keymap\_mode.rom**
-   \$ **qemu-system-i386 -M pc -m 512 -bios
    qemu\_i440fx\_piix4\_keymap\_mode.rom**

You can optionally specify the **-serial stdio** argument, so that QEMU
will emulate a serial terminal on the standard input/output (most likely
your terminal emulator or TTY).

Other arguments are available for QEMU. The manual will contain more
information.

How to update or install libreboot (if you are already running libreboot or coreboot) {#flashrom}
=====================================================================================

On all current targets, updating libreboot can be accomplished without
disassembly and, therefore, without having to externally re-flash using
any dedicated hardware. In other words, you can do everything entirely
in software, directly from the OS that is running on your libreboot
system.

**If you are using libreboot\_src or git, then make sure that you built
the sources first (see [../git/\#build](../git/#build)).**

Look at the [list of ROM images](#rom) to see which image is compatible
with your device.

Are you currently running the original, proprietary firmware?
-------------------------------------------------------------

If you are currently running the proprietary firmware (not libreboot or
coreboot), then the flashing instructions for your system are going to
be different.

X60/T60 users running the proprietary firmware should refer to
[\#flashrom\_lenovobios](#flashrom_lenovobios). MacBook2,1 users running
Apple EFI should refer to [\#flashrom\_macbook21](#flashrom_macbook21)

X200 users, refer to [x200\_external.html](x200_external.html), R400
users refer to [r400\_external.html](r400_external.html), T400 users
refer to [t400\_external.html](t400_external.html), T500 users refer to
[t500\_external.html](t500_external.html)

ASUS KFSN4-DRE?
---------------

Internal flashing should work just fine, even if you are currently
booting the proprietary firmware.

Libreboot currently lacks documentation for externally re-flashing an
LPC flash chip. However, these boards have the flash chip inside of a
PLCC socket, and it is possible to hot-swap the chips. If you want to
back up your known-working image, simply hot-swap the chip for one that
is the same capacity, after having dumped a copy of the current firmware
(flashrom -p internal -r yourchosenname.rom), and then flash that chip
with the known-working image. Check whether the system still boots, and
if it does, then it should be safe to flash the new image (because you
now have a backup of the old image).

Keeping at least one spare LPC PLCC chip with working firmware on it is
highly recommended, in case of bricks.

**DO NOT hot-swap the chip with your bare hands. Use a PLCC chip
extractor. These can be found online. See
<http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>**

Do check the HCL entry: [../hcl/kfsn4-dre.html](../hcl/kfsn4-dre.html)

ASUS KGPE-D16?
--------------

If you have the proprietary BIOS, you need to flash libreboot
externally. See [kgpe-d16.html](kgpe-d16.html).

If you already have coreboot or libreboot installed, without write
protection on the flash chip, then you can do it in software (otherwise,
see link above).

**DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 chip
extractor. These can be found online. See
<http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>**

Do check the HCL entry: [../hcl/kgpe-d16.html](../hcl/kgpe-d16.html)

ASUS KCMA-D8?
-------------

If you have the proprietary BIOS, you need to flash libreboot
externally. See [kcma-d8.html](kgpe-d8.html).

If you already have coreboot or libreboot installed, without write
protection on the flash chip, then you can do it in software (otherwise,
see link above).

**DO NOT hot-swap the chip with your bare hands. Use a PDIP-8 chip
extractor. These can be found online. See
<http://www.coreboot.org/Developer_Manual/Tools#Chip_removal_tools>**

Do check the HCL entry: [../hcl/kcma-d8.html](../hcl/kcma-d8.html)

Intel D945GCLF?
---------------

If you're running the original Intel factory BIOS, then you will need
to flash externally. For instructions on how to do that, refer to
[d945gclf.html](d945gclf.html).

Otherwise, read the generic instructions below for using the *flash*
script.

Are you currently running libreboot (or coreboot)?
--------------------------------------------------

X60/T60 users should be fine with this guide. If you write-protected the
flash chip, please refer to [x60\_unbrick.html](x60_unbrick.html),
[x60tablet\_unbrick.html](x60tablet_unbrick.html) or
[t60\_unbrick.html](t60_unbrick.html). *This probably does not apply to
you. Most people do not write-protect the flash chip, so you probably
didn't either.*

Similarly, it is possible to write-protect the flash chip in coreboot or
libreboot on GM45 laptops (X200/R400/T400/T500). If you did this, then
you will need to use the links above for flashing, treating your laptop
as though it currently has the proprietary firmware (because
write-protected SPI flash requires external re-flashing, as is also the
case when running the proprietary firmware).

If you did not write-protect the flash chip, or it came to you without
any write-protection (***libreboot does not write-protect the flash chip
by default, so this probably applies to you***), read on!

MAC address on GM45 (X200/R400/T400/T500)
-----------------------------------------

**Users of the X200/R400/T400/T500 take note:** The MAC address for the
onboard ethernet chipset is located inside the flash chip. Libreboot ROM
images for these laptops contain a generic MAC address by default, but
this is not what you want. *Make sure to change the MAC address inside
the ROM image, before flashing it. The instructions on
[../hcl/gm45\_remove\_me.html\#ich9gen](../hcl/gm45_remove_me.html#ich9gen)
show how to do this.*

It is important that you change the default MAC address, before
flashing. It will be printed on a sticker at the bottom of the laptop,
or it will be printed on a sticker next to or underneath the RAM.
Alternatively, and assuming that your current firmware has the correct
MAC address in it, you can get it from your OS.

Apple iMac 5,2?
---------------

Internal flashing works, even when flashing from Apple EFI to libreboot.
Continue reading the instructions below.

**NOTE: If you're flashing an older version of Libreboot, the iMac5,2
motherboard is compatible with the MacBook2,1. Simply flash a MacBook2,1
ROM image, and it should work.**

Flash chip size
---------------

Use this to find out:
    # flashrom -p internal -V

All good?
---------

Excellent! Moving on\...

Download the *libreboot\_util.tar.xz* archive, and extract it. Inside,
you will find a directory called *flashrom*. This contains statically
compiled executable files of the *flashrom* utility, which you will use
to re-flash your libreboot system.

Simply use *cd* on your terminal, to switch to the *libreboot\_util*
directory. Inside, there is a script called *flash*, which will detect
what CPU architecture you have (e.g. i686, x86\_64) and use the
appropriate executable. It is also possible for you to build these
executables from the libreboot source code archives.

How to update the flash chip contents:
    $ sudo ./flash update [yourrom.rom](#rom)

Ocassionally, coreboot changes the name of a given board. If flashrom
complains about a board mismatch, but you are sure that you chose the
correct ROM image, then run this alternative command:

    $ sudo ./flash forceupdate [yourrom.rom](#rom)

You should see **"Verifying flash\... VERIFIED."** written at the end
of the flashrom output. **Shut down** after you see this, and then boot
up again after a few seconds.

ThinkPad X60/T60: Initial installation guide (if running the proprietary firmware) {#flashrom_lenovobios}
==================================================================================

**This is for the ThinkPad X60 and T60 while running Lenovo BIOS. If you
already have coreboot or libreboot running, then go to
[\#flashrom](#flashrom) instead!**

**If you are flashing a Lenovo ThinkPad T60, be sure to read
[../hcl/\#supported\_t60\_list](../hcl/#supported_t60_list)**

**If you are using libreboot\_src or git, then make sure that you built
the sources first (see [../git/\#build](../git/#build)).**

**Warning: this guide will not instruct the user how to backup the
original Lenovo BIOS firmware. These backups are tied to each system,
and will not work on any other. For that, please refer to
<http://www.coreboot.org/Board:lenovo/x60/Installation>.**

**If you're using libreboot 20150518, note that there is a mistake in
the flashing script. do this: *rm -f patch && wget -O flash
https://notabug.org/libreboot/libreboot/raw/9d850543ad90b72e0e333c98075530b31e5d23f1/flash
&& chmod +x flash***

The first half of the procedure is as follows:

    $ sudo ./flash i945lenovo\_firstflash [yourrom.rom](#rom).

You should see within the output the following:\
**"Updated BUC.TS=1 - 64kb address ranges at 0xFFFE0000 and 0xFFFF0000
are swapped"**.

You should also see within the output the following:\
**"Your flash chip is in an unknown state"**, **"FAILED"** and
**"DO NOT REBOOT OR POWEROFF"**\
Seeing this means that the operation was a **resounding** success!
**DON'T PANIC**.

See this link for more details:
<http://thread.gmane.org/gmane.linux.bios.flashrom/575>.

If the above is what you see, then **SHUT DOWN**. Wait a few seconds,
and then boot; libreboot is running, but there is a 2nd procedure
**\*needed\*** (see below).

When you have booted up again, you must also do this:

    $ sudo ./flash i945lenovo\_secondflash [yourrom.rom](#rom)

If flashing fails at this stage, try the following:\
\$ **sudo ./flashrom/i686/flashrom -p
internal:laptop=force\_I\_want\_a\_brick -w [yourrom.rom](#rom)**

You should see within the output the following:\
**"Updated BUC.TS=0 - 128kb address range 0xFFFE0000-0xFFFFFFFF is
untranslated"**

You should also see within the output the following:\
**"Verifying flash\... VERIFIED."**

MacBook2,1: Initial installation guide (if running the proprietary firmware) {#flashrom_macbook21}
============================================================================

**If you have a MacBook1,1, refer to
[../hcl/\#macbook11](../hcl/#macbook11) for flashing instructions.**

**This is for the MacBook2,1 while running Apple EFI firmware. If you
already have coreboot or libreboot running, then go to
[\#flashrom](#flashrom) instead!**

Be sure to read the information in
[../hcl/\#macbook21](../hcl/#macbook21).

**Warning: this guide will not instruct the user how to backup the
original Apple EFI firmware. For that, please refer to
<http://www.coreboot.org/Board:apple/macbook21>.**

**If you are using libreboot\_src or git, then make sure that you built
the sources first (see [../git/\#build](../git/#build)).**

Look at the [list of ROM images](#rom) to see which image is compatible
with your device.

Use this flashing script, to install libreboot:

    $ sudo ./flash i945apple\_firstflash [yourrom.rom](#rom)

You should also see within the output the following:\
**"Verifying flash\... VERIFIED."**

Shut down.

Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>\
This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt)


code:
% How to program an SPI flash chip with the Raspberry Pi

This document exists as a guide for reading from or writing to an SPI
flash chip with the Raspberry Pi, using the
[flashrom](http://flashrom.org/Flashrom) software. Most revisions of the
RPi should work.

The Libreboot project recommends using
[blobless GNU/Linux](https://blog.rosenzweig.io/blobless-linux-on-the-pi.html)
on the Raspberry Pi, to avoid having to run non-free software. This
only became possible in February 2017 and the instructions below are
not yet updated with the necessary steps, so please do not follow the
steps below unless you are willing to run non-free software on your
Raspberry Pi.

This only covers SOIC-8 flash chips, for now. SOIC-16 guide coming later
(for now, it should be easy enough for you to figure this out for
SOIC-16).

[Back to previous index](../)

[](#raspberry-pi-thinkpad-x60t60-and-macbook-21){#user-content-raspberry-pi-thinkpad-x60t60-and-macbook-21 .anchor}Raspberry Pi (ThinkPad X60/T60 and Macbook 2,1)
------------------------------------------------------------------------------------------------------------------------------------------------------------------

The Raspberry Pi (a multipurpose \$25 GNU+Linux computer) can be used as
a BIOS flashing tool, thanks to its GPIO pins and SPI support.

> **Note:** The Raspberry Pi Model A is not supported, since it has no
> GPIO pins.

### [](#disassembling-the-thinkpad){#user-content-disassembling-the-thinkpad .anchor}Disassembling the ThinkPad

Follow the [X60 Hardware Maintenance
Manual](http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42x3550_04.pdf)
or [T60 Hardware Maintenance
Manual](http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42t7844_04.pdf)
to disassemble the laptop, until you can access the BIOS chip.

For photos, follow the [Libreboot T60 Recovery
Guide](http://libreboot.org/docs/install/t60_unbrick.html).

-   On the X60, the BIOS chip is on the bottom of the motherboard, under
    a layer of protective black tape.

-   On the T60, the BIOS chip is just under the palmrest, but blocked by
    a magnesium frame (which you will have to remove).

### [](#pomona-clip-pinout){#user-content-pomona-clip-pinout .anchor}Pomona Clip Pinout

Diagram of the 26 GPIO Pins of the Raspberry Pi Model B (for the Model
B+ with 40 pins, start counting from the right and leave 14 pins):

![](images/rpi/0012.png) ![](images/rpi/0013.png)

     8-pin for X60:

    ~~~~ LCD (Front) ~~~~
            8765
            ----
            |  |
            ----
            1234
    ~~~ Palmrest (back) ~~

  Pin \#   SPI Pin Name   BP (Seeed)   BP (Spkfun)   [Beagleboard Black](http://beagleboard.org/Support/bone101#headers)   [Raspberry Pi](images/rpi/0000.jpg)
  -------- -------------- ------------ ------------- --------------------------------------------------------------------- -------------------------------------
  1        CS             White        Red           Pin 17                                                                24
  2        MISO           Black        Brown         Pin 21                                                                21
  3        *not used*     *not used*   *not used*    *not used*                                                            *not used*
  4        GND            Brown        Black         Pin 1                                                                 25
  5        MOSI           Gray         Orange        Pin 18                                                                19
  6        CLK            Purple       Yellow        Pin 22                                                                23
  7        *not used*     *not used*   *not used*    *not used*                                                            *not used*
  8        3.3V           *red*        White         [3.3V PSU RED](http://libreboot.org/docs/install/bbb_setup.html)      17

Make sure the pinouts are correct; otherwise, Flashrom will fail to
detect a chip, or it will "detect" a `0x0` chip. Finally, make sure
that the Pomona clip makes contact with the metal wires of the chip. It
can be a challenge, but keep trying.

### [](#how-to-supply-power-to-the-flashchip){#user-content-how-to-supply-power-to-the-flashchip .anchor}How to supply power to the flashchip

There are two ways to supply power to the chip: plugging in an AC
adapter (without turning the laptop on), and using the 8th 3.3v pin.

I have found that the SST chips work best with the 8th pin, while the
Macronix chips require an AC Adapter to power up.

**Never connect both the 8th pin and the AC adapter at the same time.**

Your results may vary.

[](#reading-the-flashchip){#user-content-reading-the-flashchip .anchor}Reading the Flashchip
--------------------------------------------------------------------------------------------

First, visually inspect (with a magnifying glass) the type of flashchip
on the motherboard.

Next, download and compile the latest Flashrom source code on the
Raspberry Pi.

    sudo apt-get install build-essential pciutils usbutils libpci-dev libusb-dev libftdi1 libftdi-dev zlib1g-dev subversion
    svn co svn://flashrom.org/flashrom/trunk flashrom
    cd flashrom
    make
    sudo modprobe spi_bcm2708
    sudo modprobe spidev

If your chip is an SST, run this command:

    sudo ./flashrom -p linux_spi:dev=/dev/spidev0.0 -r test.rom

If your chip is a Macronix, run this command:

    sudo ./flashrom -c "MX25L1605" -p linux_spi:dev=/dev/spidev0.0 -r test.rom

Next, check the md5sum of the dump:

    md5sum test.rom

Run the `flashrom` command again to make a second dump. Then, check the
md5sum of the second dump:

    md5sum test.rom

If the md5sums match after three tries, `flashrom` has managed to read
the flashchip precisely (but not always accurately). You may try and
flash Libreboot now.

[](#flashing-libreboot){#user-content-flashing-libreboot .anchor}Flashing Libreboot
-----------------------------------------------------------------------------------

> **Note:** replace `/path/to/libreboot.rom` with the location of your
> chosen ROM, such as `../bin/x60/libreboot_usqwerty.rom`):

If your chip is an SST, run this command:

    sudo ./flashrom -p linux_spi:dev=/dev/spidev0.0 -w /path/to/libreboot.rom

If your chip is a Macronix, run this command:

    sudo ./flashrom -c "MX25L1605" -p linux_spi:dev=/dev/spidev0.0 -w /path/to/libreboot.rom

Once that command outputs the following, the flash has completed
successfully. If not, just flash again.

    Reading old flash chip contents... done.
    Erasing and writing flash chip... Erase/write done.
    Verifying flash... VERIFIED.

### [](#sources){#user-content-sources .anchor}Sources

-   [Scruss - Simple ADC with the Raspberry
    Pi](http://scruss.com/blog/2013/02/02/simple-adc-with-the-raspberry-pi/)
-   [Flashing coreboot on a T60 with a Raspberry Pi -
    the\_unconventional's
    blog](https://blogs.fsfe.org/the_unconventional/2015/05/08/flashing-coreboot-on-a-t60-with-a-raspberry-pi/)
-   **Pomona SOIC Clip flashing**
    -   [Arch Linux Wiki - Installing Arch Linux on
        Chromebook](https://wiki.archlinux.org/index.php/Chromebook)
    -   [Google Drive - Raspberry Pi SOIC Clip
        connection](https://drive.google.com/folderview?id=0B9f62MH0umbmRTA2Xzd5WHhjWEU&usp=sharing)
    -   [rPI with Flashrom and SOIC Clip
        Powerpoint](http://satxhackers.org/wp/hack-content/uploads/2013/04/rPI_flashrom.pdf)

### [](#raspberry-pi-pinout-diagrams){#user-content-raspberry-pi-pinout-diagrams .anchor}Raspberry Pi Pinout Diagrams

  MCP   3008 Pin   Pi GPIO Pin \#   Pi Pin Name
  ----- ---------- ---------------- --------------------
  16    `VDD`      1                `3.3 V`
  15    `VREF`     1                `3.3 V`
  14    `AGND`     6                `GND`
  13    `CLK`      23               `GPIO11 SPI0_SCLK`
  12    `DOUT`     21               `GPIO09 SPI0_MISO`
  11    `DIN`      19               `GPIO10 SPI0_MOSI`
  10    `CS`       24               `GPIO08 CE0`
  9     `DGND`     6                `GND`

-   Source: [Perl & Raspberry Pi - Raspberry Pi GPIO
    Pinout](http://raspberrypi.znix.com/hipidocs/topic_gpiopins.htm)

[](#raspberry-pi-thinkpad-x200){#user-content-raspberry-pi-thinkpad-x200 .anchor}Raspberry Pi (ThinkPad X200)
-------------------------------------------------------------------------------------------------------------

### [](#requirements){#user-content-requirements .anchor}Requirements:

-   An x86, x86\_64, or arm7l (for changing the libreboot.rom image mac
    address)
-   Raspberry Pi and peripherals
-   Relevant SOIC clip
-   6 female - female jumpers
-   Internet connection
-   Screw drivers

Follow the [ThinkPad X200: Initial installation
guide](http://libreboot.org/docs/install/x200_external.html) to
disassemble the laptop, and access the BIOS rom chip.

> **Note:** `x86#` refers to commands to be run on the x86 computer, and
> `pi#` refers to commands to be run on the pi. A good practice is to
> make a work directory to keep your libreboot stuff inside.

    x86# mkdir ~/work

Download NOOBS from [The Raspberry Pi
Foundation.](https://www.raspberrypi.org/downloads/) Torrent download
recommended, and remember to seed. :)

If you're running Raspian, you can do **sudo raspi-config**, enable SPI
under Advanced and then spidev will be enabled. Simple, eh?

[Download Libreboot from their releases
page](http://www.libreboot.org/download/). For your safety, verify the
GPG signature as well.

    x86# gpg --keyserver prefered.keyserver.org --recv-keys 0x656F212E

    x86# for signature in $(ls *.sig); do gpg --verify $signature; done

Extract NOOBS and libreboot.

    x86# mkdir ~/work/noobs

    x86# unzip ~/Downloads/NOOBS_v1_4_1.zip -d ~/work/noobs/

    x86# cd ~/work && tar -xvJf ~/Downloads/libreboot_bin.tar.xz

Install Noobs to your fat32 formatted SD card

    x86# cp -R ~/work/noobs/* /path/to/mounted/SDcard/

### [](#set-up-noobs-on-raspberry-pi){#user-content-set-up-noobs-on-raspberry-pi .anchor}Set up NOOBS on Raspberry Pi

Plug in the NOOBs SDCard to your Raspberry Pi, and enable the following
under 'Advanced Options':

SSH server

SPI

I2C

On first boot

    pi# sudo apt-get update && sudo apt-get dist-upgrade && reboot

On second boot

    pi# sudo apt-get update && sudo apt-get install libftdi1 libftdi-dev libusb-dev libpci-dev subversion

Other dependencies that should already be installed with the noobs base
install include:

pciutils, zlib, libusb, build-essential

If they are missing then install them.

Download and build flashrom.

    pi# svn co svn://flashrom.org/flashrom/trunk ~/flashrom

    pi# cd ~/flashrom

    pi# make

    pi# sudo make install

On your x86 box change the libreboot.rom mac address

    x86# cd ~/work/libreboot_bin/

Change the mac address on the libreboot images to match yours.

    x86# ./ich9macchange XX:XX:XX:XX:XX:XX

Move the libreboot.rom image over to your pi

    x86# scp ~/work/libreboot_bin/<path_to_your_bin> pi@your.pi.address:~/flashrom/libreboot.rom

Shutdown your pi, write down your rom chip model, and wire up the clip

    pi# sudo shutdown now -hP

Chip model name

![](images/rpi/0001.jpg)

Pinout. You may want to download the image so you can zoom in on the
text.

![](images/rpi/0002.jpg)

  Pin \#   SPI Pin Name   Raspberry Pi Pin \#
  -------- -------------- ---------------------
  1        *not used*     *not used*
  2        3.3V           1
  3        *not used*     *not used*
  4        *not used*     *not used*
  5        *not used*     *not used*
  6        *not used*     *not used*
  7        CS\#           24
  8        S0/SIO1        21
  9        *not used*     *not used*
  10       GND            25
  11       *not used*     *not used*
  12       *not used*     *not used*
  13       *not used*     *not used*
  14       *not used*     *not used*
  15       S1/SIO0        19
  16       SCLK           23

> **Note:** The raspberry pi 3.3V rail should be sufficient to power the
> chip during flashing, so no external power supply should be required;
> however, at the time of writing that has only been tested and
> confirmed for one chip, the MX25L6405D.

Macronix Spec sheet so you can adjust your pinout for 8 pin 4Mb chips as
necessary

![](images/rpi/0014.gif)

At this point connect your SOIC clip to the rom chip before powering on
your PI.

Power on your Pi, and run the following. Ensure you swap out
"your\_chip\_name" with the proper name/model of your chip. Check that
it can be read successfully. If you cannot read the chip and receive an
error similar to "no EEPROM Detected" or "0x0 Chip detected" then
you may want to try powering off your PI, and switching the two pins
which are connected to the IO ports. I.E. Connect pins (clip)8 to (pi)19
and pins (clip)15 to (pi)21

    pi# cd ~/flashrom

    pi# ./flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=512 --chip <your_chip_name> -r romread1.rom

    pi# ./flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=512 --chip <your_chip_name> -r romread2.rom

    pi# ./flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=512 --chip <your_chip_name> -r romread3.rom

    pi# sha512sum romread*.rom

If they are identical sha512 hashes then you can generally assume that
it's safe to flash your rom.

    pi# ./flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=512 --chip <your_chip_name> -w libreboot.rom

It may fail a couple times, but keep at it and when you get the message
`Verifying flash... Verified` or
`Warning: Chip content is identical to the requested image` then you're
done.

Shut down your pi, put your box back together, and install a libre OS
for great good!

[](#raspberry-pi-c720-chromebook){#user-content-raspberry-pi-c720-chromebook .anchor}Raspberry Pi (C720 Chromebook)
-------------------------------------------------------------------------------------------------------------------

The Raspberry Pi (a multipurpose \$25 GNU+Linux computer) can be used as
a BIOS flashing tool, thanks to its GPIO pins and SPI support.

### [](#what-you-need){#user-content-what-you-need .anchor}What you need

-   \$25 - Raspberry Pi Model B (Rev.2 or higher)
-   \$10-20 - SOIC-8 Pomona Clip
    -   Usually comes bundled with nice, color-colored *female to
        female* wires

### [](#raspberry-pi-pinouts){#user-content-raspberry-pi-pinouts .anchor}Raspberry Pi Pinouts

GPIO Pinouts:

![](images/rpi/0009.png) ![](images/rpi/0010.png)

> \*Diagram made by ["Pacman" from Win-Raid
> Forums\*](http://www.win-raid.com/t58f16-Guide-Recover-from-failed-BIOS-flash-using-Raspberry-PI.html)

SOIC Pinouts:

![](docs/rpi/0011.png)

### [](#plugging-in-the-soic-clip){#user-content-plugging-in-the-soic-clip .anchor}Plugging in the SOIC Clip

We have to connect the Raspberry Pi to the SOIC Clip as shown in the
below diagram (using the f-f wires usually included with the Pomona
clip).

![SOIC Pinouts for C720 Chromebook](images/rpi/0003.png)

(C720 Only?) The diagram depicts a "bridged" connection. You will need
to fashion one with some copper wire:

![Bridged wires](images/rpi/0004.jpg)

Plug in the wires to the clip as shown below:

![Pomona Clip connections](images/rpi/0005.jpg)

Plug in the other end of the wires to the Raspberry Pi as shown below:

![Raspberry Pi connections](images/rpi/0006.jpg)

(C720 only?) Plug in the "bridged" wires as shown below:

![Bridged wires connected](images/rpi/0007.jpg)

Finally, put the Pomona SOIC clip on the chip:

![Pomona Clip Connected](images/rpi/0008.jpg)

### [](#flashrom){#user-content-flashrom .anchor}Flashrom

[Once it's all set up, flashrom works out of the
box.](http://www.flashrom.org/RaspberryPi)

### [](#sources-1){#user-content-sources-1 .anchor}Sources

-   **Pomona SOIC Clip flashing**
    -   [Arch Linux Wiki - Installing Arch Linux on
        Chromebook](https://wiki.archlinux.org/index.php/Chromebook)
    -   [Google Drive - Raspberry Pi SOIC Clip
        connection](https://drive.google.com/folderview?id=0B9f62MH0umbmRTA2Xzd5WHhjWEU&usp=sharing)
    -   [rPI with Flashrom and SOIC Clip
        Powerpoint](http://satxhackers.org/wp/hack-content/uploads/2013/04/rPI_flashrom.pdf)
    -   [Tnhh - Unbricking Chromebook with
        Beaglebone](http://www.tnhh.net/2014/08/25/unbricking-chromebook-with-beaglebone.html)
-   **Use a DIY DIP System to flash an desoldered BIOS chip**
    -   [Viktak - How to recover laptop after failed BIOS
        flash](http://diy.viktak.com/2014/07/how-to-recover-laptop-after-failed-bios.html)
    -   [Win-Raid - Recover from Failed BIOS Flashing using Raspberry
        Pi](http://www.win-raid.com/t58f16-Guide-Recover-from-failed-BIOS-flash-using-Raspberry-PI.html)

Copyright © 2014, 2015 Lawrence Wu <sagnessagiel@gmail.com>\
Copyright © 2015 snuffeluffegus <>\
Copyright © 2015 Kevin Keijzer <>\
Copyright © 2016 Leah Rowe <info@minifree.org>\
This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt)


code:
From 34270811fce1ecf0bcf3b1363b0dc3dbf284ab09 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Wed, 10 Jun 2015 22:53:28 +0000
Subject: flash script: fix a really really really dumb mistake

---
diff --git a/flash b/flash
index c96b915..04fd274 100755
--- a/flash
+++ b/flash
@@ -95,12 +95,12 @@ if [ "$mode" = "i945lenovo_firstflash" ] || [ "$mode" = "i945lenovo_secondflash"
 		# git or libreboot_src
 		bucts="./bucts/bucts"
 		flashrom_lenovobios_sst="./flashrom/flashrom_lenovobios_sst"
-		flashrom_lenovobios_macronix="./flashrom/flashrom_lenovobios_sst"
+		flashrom_lenovobios_macronix="./flashrom/flashrom_lenovobios_macronix"
 	else
 		# libreboot_util
 		bucts="./bucts/$arch/bucts"
 		flashrom_lenovobios_sst="./flashrom/$arch/flashrom_lenovobios_sst"
-		flashrom_lenovobios_macronix="./flashrom/$arch/flashrom_lenovobios_sst"
+		flashrom_lenovobios_macronix="./flashrom/$arch/flashrom_lenovobios_macronix"
 	fi

 	# anti-bricking precaution
--
cgit v0.9.0.2


code:
---
title: Miscellaneous
x-toc-enable: true
...

High Pitched Whining Noise on Idle in Debian or Devuan
======================================================================

Start powertop automatically at boot time.

Included with libreboot is a script called 'powertop.debian'. Run this
as root and it will setup powertop to run with --auto-tune at boot
time. Load the file in your text editor to see how it does that.

    $ sudo ./resources/scripts/misc/powertop.debian

Might want to run with --calibrate first

If powertop doesn't work, another way (reduces battery life slightly)
is to add *processor.max\_cstate=2* to the *linux* line in grub.cfg,
using [this guide](../gnulinux/grub_cbfs.html).

High Pitched Whining Noise on Idle in Parabola
==============================================================

The following removes most of the noise. It reduces what is a high
frequency whine (that not everyone can hear) to a slight buzz (which
most people can't hear or doesn't bother most people).

This is not perfect! The full solution is still not discovered but this
is a step towards that. Also, in some instances you will need to run
'sudo powertop --auto-tune' again. This needs to be implemented
properly in coreboot itself!

On the X60 with coreboot or libreboot, there is a high pitched sound
when idle. So far we have use processor.max\_cstate=2 or idle=halt in
GRUB. These consume power. Stop using them!

Be root

    $ su -

Installed powertop:

    # pacman -S powertop

and added the following to /etc/systemd/system/powertop.service :

    [Unit]
    Description=Powertop tunings

    [Service]
    Type=oneshot
    RemainAfterExit=no
    ExecStart=/usr/bin/powertop --auto-tune
    # "powertop --auto-tune" still needs a terminal for some reason. Possibly a bug?
    Environment="TERM=xterm"

    [Install]
    WantedBy=multi-user.target

Finally, as root do that:

    # systemctl enable powertop
    # systemctl start powertop

The next time you boot the system, the buzz will be gone.

Might want to run with --calibrate first

If powertop doesn't work, another way (reduces battery life slightly)
is to add *processor.max\_cstate=2* to the *linux* line in grub.cfg,
using [this guide](../gnulinux/grub_cbfs.html).

X60/T60: Serial port - how to use (for dock owners)
===================================================

For the Thinkpad X60 you can use the **"UltraBase X6"** dock (for the
X60 Tablet it is called X6 Tablet UltraBase). For the ThinkPad T60, you
can use the **"Advanced Mini Dock"**.

If you are using one of the ROM images with 'serial' in the name, then
you have serial port enabled in libreboot and you have memtest86+
included inside the ROM. Connect your null modem cable to the serial
port on the dock and connect the other end to a 2nd system using your
USB Serial adapter.

On the 2nd system, you can try this (using GNU Screen):

    $ sudo screen /dev/ttyUSB0 115200

How to quit GNU Screen: Ctrl+A then release and press K, and then press
Y.

There are also others like Minicom but I like GNU Screen

By doing this before booting the X60/T60, you will see console output
from libreboot. You will also see GRUB displaying on the serial output,
and you will be able to see MemTest86+ on the serial output aswell. You
can also configure your distro so that a terminal (TTY) is accessible
from the serial console.

The following guide is for Ubuntu, but it should work in Debian and
Devuan, to enable a serial console using GeTTY:\
<https://help.ubuntu.com/community/SerialConsoleHowto> (we DO NOT
recommend Ubuntu, because it contains non-free software in the default
repos. Use Debian or Devuan)

Note: part of the tutorial above requires changing your grub.cfg. Just
change the **linux** line to add instructions for enabling getty. See
[../gnulinux/grub\_cbfs.html](../gnulinux/grub_cbfs.html).

Finetune backlight control on intel gpu's
=========================================

Sometimes the backlight control value (BLC\_PWM\_CTL) set by libreboot
is not ideal. The result is either flicker, which could cause nausea or
epilepsy or an uneven backlight and/or coil whine coming from the
display. To fix this a different value for the gpu reg BLC\_PWM\_CTL
needs to be set. See p94 of
<https://01.org/sites/default/files/documentation/g45_vol_3_register_0_0.pdf>
for more information on this reg. The tool for setting registry values
on intel gpu's is included in intel-gpu-tools. Install intel-gpu-tools:
**sudo apt-get install intel-gpu-tools**

You can set values: **sudo intel\_reg write 0x00061254
&ltyour\_value>**

The value set has the following structure: bits \[31:16\] is PWM
divider. PWM / PWM\_divider = frequency bits \[15:0\] is the duty cycle
and determines the portion of the backlight modulation frequency. A
value of 0 will mean that the display is off. A value equal to the
backlight modulation frequency means full on. The value should not be
larger than the backlight modulation frequency.

On displays with a CCFL backlight start from: 0x60016001 To verify if
all modes work as desired use: **xbacklight -set 10** and gradually
increase until 100. Displays with an LED backlight need a lower
backlight modulation. Do the same thing but start from 0x01290129 . Try
setting different values until you have found a value which presents no
issue.

It is important to know that there are four failure modes:

1.  flickering very fast, which could cause epilepsy (frequency is too
    low. decrease divider)
2.  randomly flickering in random intervals - driver IC cannot keep up
    with toggling the mosfet (frequency too fast, increase divider)
3.  frequency is in audible range and causes coils to whine (frequency
    is too high. increase divider)
4.  backlight is uneven. (CCFL specific, frequency is too high. increase
    divider)

To check for flickering try moving your laptop while looking at it.

A higher frequency equals higher power consumption. You want to find the
highest good working value.

Next this value should be set at boot: either add

    intel_reg write 0x00061254 &ltyour_ideal_value>

before exit 0 in /etc/rc.local or create a systemd service file
/etc/systemd/system/backlight.service:
    [Unit]
    Description=Set BLC_PWM_CTL to a good value
    [Service]
    Type=oneshot
    RemainAfterExit=no
    ExecStart=/usr/bin/intel_reg write 0x00061254 &ltyour_value>
    [Install]
    WantedBy=multi-user.target

Now start and enable it: **sudo systemctl start backlight && sudo
systemctl enable backlight**
Special note on i945:

i945 behaves differently. Bit 16 needs to be 1 and the duty cycle is not
updated when backlight is changed. There are no available datasheets on
this target so why it behaves in such a way is not known. So to find a
working value BLC\_PWM\_CTL set bit 16 to 1 and make sure PWM divider ==
duty cycle. see <https://review.coreboot.org/#/c/10624/> on bit 16. The
cause of this issue is that i945, in contrast with to GM45, is set to
work in BLM Legacy Mode. This makes backlight more complicated since the
duty cycle is derived from 3 instead of 2 registers using the following
formula: if(BPC\[7:0\] <> xFF) then BPCR\[15:0\] \* BPC\[7:0\]
Else BPCR\[15:0\] BPC is LBB - PCI Backlight Control Register, described
on <http://www.mouser.com/pdfdocs/945gmedatasheet.pdf> on page 315. BPCR
is BLC\_PWM\_CTL described in
<https://01.org/sites/default/files/documentation/g45_vol_3_register_0_0.pdf>
on page 94. More research needs to be done on this target so proceed
with care.

Power Management Beeps on Thinkpads
===================================

When disconnecting or connecting the charger, a beep occurs. When the
battery goes to a critically low charge level, a beep occurs. Nvramtool
is included in libreboot, and can be used to enable or disable this
behaviour.

Disable or enable beeps when removing/adding the charger:
    $ sudo ./nvramtool -w power\_management\_beeps=Enable
    $ sudo ./nvramtool -w power\_management\_beeps=Disable

Disable or enable beeps when battery is low:
    $ sudo ./nvramtool -w low\_battery\_beep=Enable

    $ sudo ./nvramtool -w low\_battery\_beep=Disable

A reboot is required, for these changes to take effect.

Get EDID: Find out the name (model) of your LCD panel
=====================================================

Get the panel name with **sudo get-edid | strings**\
Or look in **/sys/class/drm/card0-LVDS-1/edid**

Alternatively you can use i2cdump. In Debian and Devuan, this is in the
package i2c-tools.

    $ sudo modprobe i2c-dev
    $ sudo i2cdump -y 5 0x50 (you might have to change the value for
-y)

    $ sudo rmmod i2c-dev
You'll see the panel name in the output (from the EDID dump).

If neither of these options work (or they are unavailable), physically
removing the LCD panel is an option. Usually, there will be information
printed on the back.

e1000e driver trouble shooting (Intel NICs)
===========================================

Example error, ¿may happen on weird and complex routing schemes(citation
needed for cause):

    e1000e 0000:00:19.0 enp0s25: Detected Hardware Unit Hang

Possible workaround, tested by Nazara: Disable C-STATES.\
**NOTE: this also disables power management, because disabling C-States
means that your CPU will now be running at full capacity (and therefore
using more power) non-stop, which will drain battery life if this is a
laptop. If power usage is a concern, then you should not use this.
(we're also not sure whether this workaround is appropriate)**

To disable c-states, do this in GNU+Linux:\
**for i in /sys/devices/system/cpu/cpu/cpuidle/state/disable; do echo 1
> \$i; done**

You can reproduce this issue more easily by sending lots of traffic
across subnets on the same interface (NIC).

More information, including logs, can be found on [this
page](https://notabug.org/libreboot/libreboot/issues/23).

USB keyboard wakeup on GM45 laptops
===================================

Look at resources/scripts/helpers/misc/libreboot\_usb\_bugfix

Put this script in /etc/init.d/ on debian-based systems.

Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>\
This page is available under the [CC BY SA 4.0](../cc-by-sa-4.0.txt)


code:
% Libreboot release information

Updated versions of libreboot can be found at
[libreboot.org](http://libreboot.org/).

Old releases
------------

See [archive\_old.html](archive_old.html) for information about older
libreboot releases.

Libreboot 20160907 {#release20160907}
==================

Release date: 7th September 2016

For existing boards, there are no new board specific changes.

This release adds one new mainboard to libreboot:

-   Intel D945GCLF desktop motherboard (thanks to Arthur Heymans)

Other bugfixes:

-   Various improvements to the documentation
-   re-added "unset superusers" to the grub.cfg, which was needed for
    some users depending on the distros that they used

Libreboot 20160902 {#release20160922}
==================

Release date: 2nd September 2016.

This fixes build issues in the previous 20160818 release. See change log
for details.

Libreboot 20160818 {#release20160818}
==================

Release date: 18th August 2016.

Installation instructions can be found at ***docs/install/***. Building
instructions (for source code) can be found at ***docs/git/\#build***.

Machines supported in this release:
-----------------------------------

-   **ASUS Chromebook C201**
    -   Check notes in ***docs/hcl/c201.html***
-   **Gigabyte GA-G41M-ES2L desktop motherboard**
    -   Check notes in ***docs/hcl/ga-g41m-es2l.html***
-   **Intel D510MO desktop motherboard**
    -   Check notes in ***docs/hcl/d510mo.html***
-   **Intel D945GCLF desktop motherboard**
    -   Check notes in ***docs/hcl/d945gclf.html***
-   **Apple iMac 5,2**
    -   Check notes in ***docs/hcl/imac52.html***
-   **ASUS KFSN4-DRE server board**
    -   PCB revision 1.05G is the best version (can use 6-core CPUs)
    -   Check notes in ***docs/hcl/kfsn4-dre.html***
-   **ASUS KGPE-D16 server board**
    -   Check notes in ***docs/hcl/kgpe-d16.html***
-   **ASUS KCMA-D8 desktop/workstation board**
    -   Check notes in ***docs/hcl/kcma-d8.html***
-   **ThinkPad X60/X60s**
    -   You can also remove the motherboard from an X61/X61s and replace
        it with an X60/X60s motherboard. An X60 Tablet motherboard will
        also fit inside an X60/X60s.
-   **ThinkPad X60 Tablet** (1024x768 and 1400x1050) with digitizer
    support
    -   See ***docs/hcl/\#supported\_x60t\_list*** for list of supported
        LCD panels
    -   It is unknown whether an X61 Tablet can have it's mainboard
        replaced with an X60 Tablet motherboard.
-   **ThinkPad T60** (Intel GPU) (there are issues; see below):
    -   See notes below for exceptions, and
        ***docs/hcl/\#supported\_t60\_list*** for known working LCD
        panels.
    -   It is unknown whether a T61 can have it's mainboard replaced
        with a T60 motherboard.
    -   See ***docs/future/\#t60\_cpu\_microcode***.
    -   T60P (and T60 laptops with ATI GPU) will likely never be
        supported: ***docs/hcl/\#t60\_ati\_intel***
-   **ThinkPad X200**
    -   X200S and X200 Tablet are also supported, conditionally; see
        ***docs/hcl/x200.html\#x200s***
    -   **ME/AMT**: libreboot removes this, permanently.
        ***docs/hcl/gm45\_remove\_me.html***
-   **ThinkPad R400**
    -   See ***docs/hcl/r400.html***
    -   **ME/AMT**: libreboot removes this, permanently.
        ***docs/hcl/gm45\_remove\_me.html***
-   **ThinkPad T400**
    -   See ***docs/hcl/t400.html***
    -   **ME/AMT**: libreboot removes this, permanently.
        ***docs/hcl/gm45\_remove\_me.html***
-   **ThinkPad T500**
    -   See ***docs/hcl/t500.html***
    -   **ME/AMT**: libreboot removes this, permanently.
        ***docs/hcl/gm45\_remove\_me.html***
-   **Apple MacBook1,1** (MA255LL/A, MA254LL/A, MA472LL/A)
    -   See ***docs/hcl/\#macbook11***.
-   **Apple MacBook2,1** (MA699LL/A, MA701LL/A, MB061LL/A, MA700LL/A,
    MB063LL/A, MB062LL/A)
    -   See ***docs/hcl/\#macbook21***.

Changes for this release, relative to r20150518 (earliest changes last, recent changes first)
---------------------------------------------------------------------------------------------

-   NEW BOARDS ADDED:
    -   ASUS Chromebook C201 (ARM laptop) (thanks to Paul Kocialkowski)
    -   Gigabyte GA-G41M-ES2L motherboard (desktop) (thanks to Damien
        Zammit)
    -   Intel D510MO motherboard (desktop) (thanks to Damien Zammit)
    -   ASUS KCMA-D8 motherboard (desktop) (thanks to Timothy Pearson)
    -   ASUS KFSN4-DRE motherboard (server) (thanks to Timothy Pearson)
    -   ASUS KGPE-D16 motherboard (server) (thanks to Timothy Pearson)

For details development history on these boards, refer to the git log
and documentation.

For boards previously supported, many fixes from upstream have been
merged.

Other changes (compared to libreboot 20150518), for libreboot in general
or for previously supported systems: (this is a summary. For more
detailed change list, refer to the git log)

256MiB VRAM allocated on GM45 (X200, T400, T500, R400) instead of 32MiB.
This is an improvement over both Lenovo BIOS and Libreboot 20150518,
allowing video decoding at 1080p to be smoother. (thanks Arthur Heymans)
To clarify, GM45 video performance in libreboot 20160818 is better than
on the original BIOS and the previous libreboot release.

64MiB VRAM on i945 (X60, T60, MacBook2,1) now supported in
coreboot-libre, and used by default (in the previous release, it was
8MiB allocated). Thanks to Arthur Heymans.

Higher battery life on GM45 (X200, T400, T500, R400) due to higher
cstates now being supported (thanks Arthur Heymans). C4 power states
also supported.

Higher battery life on i945 (X60, T60, MacBook2,1) due to better CPU
C-state settings. (Deep C4, Dynamicl L2 shrinking, C2E).

Text mode on GM45 (X200, T400, T500, R400) now works, making it possible
to use MemTest86+ comfortably. (thanks to Nick High from coreboot)

Dual channel LVDS displays on GM45 (T400, T500) are now automatically
detected in coreboot-libre. (thanks Vladimir Serbinenko from coreboot)

Partial fix in coreboot-libre for GRUB display on GM45, for dual channel
LVDS higher resolution LCD panels (T400, T500). (thanks Arthur Heymans)

Massively improved GRUB configuration, making it easier to boot more
encrypted systems automatically, and generally a more useful menu for
booting the system (thanks go to Klemens Nanni of the autoboot project).
Libreboot now uses the grub.cfg provided by the installed GNU+Linux
distribution automatically, if present, switching to that configuration.
This is done across many partitions, where libreboot actively searches
for a configuration file (also on LVM volumes and encrypted volumes).
This should make libreboot more easy to use for non-technical users,
without having to modify the GRUB configuration used in libreboot.

Utilities archives is now source only. You will need to compile the
packages in there (build scripts included, and a script for installing
build dependencies). (binary utility archives are planned again in the
next release, when the new build system is merged)

SeaGRUB is now the default payload on all x86 boards. (SeaBIOS
configured to load a compressed GRUB payload from CBFS immediately,
without providing an interface in SeaBIOS. This way, GRUB is still used
but now BIOS services are available, so you get the best of both
worlds). Thanks go to Timothy Pearson of coreboot for this idea.

crossgcc is now downloaded and built as a separate module to
coreboot-libre, with a universal revision used to build all boards.

Individual boards now have their own coreboot revision and patches,
independently of each other board. This makes maintenance easier.

Updated all utilities, and modules (coreboot, GRUB, etc) to newer
versions, with various bugfixes and improvements upstream.

RTC century byte issue now fixed on GM45 in coreboot-libre, so the date
should now be correctly displayed when running the latest linux kernel,
instead of seeing 1970-01-01 when you boot (thanks to Alexander Couzens
from coreboot)

Build system now uses multiple CPU cores when building, speeding up
building for some people. Manually specifying how many cores are needed
is also possible, for those using the build system in a chroot
environment. (thanks go to Timothy Pearson from coreboot)

In the build system (git repository), https:// is now used when cloning
coreboot. http:// is used as a fallback for GRUB, if git:// fails.

New payload, the depthcharge bootloader (free bootloader maintained by
Google) for use on the ASUS Chromebook C201. (thanks go to Paul
Kocialkowski)

Various fixes to the ich9gen utility (e.g. flash component density is
now set correctly in the descriptor, gbe-less descriptors now supported)

Copyright © 2014, 2015, 2016 Leah Rowe <info@minifree.org>\
This page is available under the [CC BY SA 4.0](cc-by-sa-4.0.txt)