Yiting Wang

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upvoted a paper 8 days ago

SymRTLO: Enhancing RTL Code Optimization with LLMs and Neuron-Inspired Symbolic Reasoning

Paper • 2504.10369 • Published Apr 14 • 2

updated a model 8 days ago

Nellyw888/verilog-multiturn-2b

Updated 8 days ago • 3

published a model 8 days ago

Nellyw888/verilog-multiturn-2b

Updated 8 days ago • 3

upvoted a paper 25 days ago

VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation

Paper • 2505.11849 • Published May 17 • 2

liked a dataset about 2 months ago

Nellyw888/VeriReason-RTL-Coder_7b_reasoning_tb

Viewer • Updated May 31 • 1.15k • 120 • 4

liked a model about 2 months ago

Nellyw888/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb

Reinforcement Learning • 8B • Updated May 31 • 825 • 4

updated a collection about 2 months ago

Verireason

Collection

Dataset and Model for paper: "VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation" • 9 items • Updated Jun 6 • 1

upvoted a collection 2 months ago

Verireason

Collection

Dataset and Model for paper: "VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation" • 9 items • Updated Jun 6 • 1

updated a model 2 months ago

Nellyw888/VeriReason-Qwen2.5-3b-RTLCoder-Verilog-GRPO-reasoning-tb

Reinforcement Learning • 3B • Updated May 31 • 26

updated 2 datasets 2 months ago

Nellyw888/VeriReason-RTL-Coder_7b_reasoning_tb_simple

Viewer • Updated May 31 • 743 • 40

Nellyw888/VeriReason-RTL-Coder_7b_reasoning_tb

Viewer • Updated May 31 • 1.15k • 120 • 4

updated 3 models 2 months ago

Nellyw888/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb

Reinforcement Learning • 7B • Updated May 31 • 819 • 2

Nellyw888/VeriReason-Qwen2.5-7b-RTLCoder-Verilog-GRPO-reasoning-tb

Reinforcement Learning • 8B • Updated May 31 • 825 • 4

Nellyw888/Qwen2.5-7b-simple-38

Text Generation • 8B • Updated May 23 • 3

published a model 2 months ago

Nellyw888/Qwen2.5-7b-simple-38

Text Generation • 8B • Updated May 23 • 3

updated a model 2 months ago

Nellyw888/VeriReason-Qwen2.5-1.5b-RTLCoder-Verilog-GRPO-reasoning-tb

Reinforcement Learning • 2B • Updated May 20 • 26 • 1

authored 2 papers 2 months ago

SymRTLO: Enhancing RTL Code Optimization with LLMs and Neuron-Inspired Symbolic Reasoning

Paper • 2504.10369 • Published Apr 14 • 2

VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation

Paper • 2505.11849 • Published May 17 • 2

updated 2 datasets 2 months ago

Nellyw888/RTL-Coder_small

Viewer • Updated May 20 • 2.65k • 21

Nellyw888/RTL-Coder_7b_reasoning

Viewer • Updated May 20 • 1.3k • 36